GitLab

gcc/fortran/ChangeLog:

	PR fortran/99514
	* resolve.c (resolve_symbol): Accept vars which are in DATA
	and hence (either) implicit SAVE (or in common).

gcc/testsuite/ChangeLog:

	PR fortran/99514
	* gfortran.dg/gomp/threadprivate-1.f90: New test.

gcc/ChangeLog:

	PR fortran/98858
	* gimplify.c (omp_add_variable): Handle NULL_TREE as size
	occuring for assumed-size arrays in use_device_{ptr,addr}.

libgomp/ChangeLog:

	PR fortran/98858
	* testsuite/libgomp.fortran/use_device_ptr-3.f90: New test.

libgfortran/ChangeLog:

	* io/transfer.c (st_read_done_worker, st_write_done_worker):
	Call unlock_unit here, add unit_lock lock around newunit_free call.
	(st_read_done, st_write_done): Only call unlock_unit when not
	calling the worker function.
	* io/unit.c (set_internal_unit): Don't reset the unit_number
	to the same number as this cause race warnings.

This is the final patch of the series started with
https://gcc.gnu.org/pipermail/gcc-patches/2021-March/566139.html
and continued with
https://gcc.gnu.org/pipermail/gcc-patches/2021-March/566356.html
This time, I went through all the remaining instructions marked
by gas as requiring both AVX512BW and AVX512VL and for each checked
tmp-mddump.md, figure out if it ever could be a problem (e.g. instructions
that require AVX512BW+AVX512VL, but didn't exist before AVX512F are usually
fine, the patterns have the right conditions, the bugs are typically on
pre-AVX512F patterns where we have just blindly added v while they actually
can't access those unless AVX512BW+AVX512VL), added test where possible
(the test doesn't cover MMX though)and fixed md bugs.

For mmx pextr[bw]/pinsr[bw] patterns it introduces per discussions
a new YW constraint that only requires AVX512BW and not AVX512VL, because
those instructions only require the former and not latter when using EVEX
encoding.

There are some other interesting details, e.g. most of the 8 interleave
patterns (vpunck[hl]{bw,wd}) had correctly
&& <mask_avx512vl_condition> && <mask_avx512bw_condition>
in the conditions because for masking it needs to be always EVEX encoded
and then it needs both VL+BW, but 2 of those 8 had just
&& <mask_avx512vl_condition>
and so again would run into the -mavx512vl -mno-avx512bw problems.

Another problem different from others was mmx eq/gt comparisons, that was
using Yv constraints, so would happily accept %xmm16+ registers for
-mavx512vl, but there actually are no such EVEX encoded instructions,
as AVX512 comparisons work with %k* registers instead.

The newly added testcase without the patch fails with:
/tmp/ccVROLo2.s: Assembler messages:
/tmp/ccVROLo2.s:9: Error: unsupported instruction `vpabsb'
/tmp/ccVROLo2.s:20: Error: unsupported instruction `vpabsb'
/tmp/ccVROLo2.s:31: Error: unsupported instruction `vpabsw'
/tmp/ccVROLo2.s:42: Error: unsupported instruction `vpabsw'
/tmp/ccVROLo2.s:53: Error: unsupported instruction `vpaddsb'
/tmp/ccVROLo2.s:64: Error: unsupported instruction `vpaddsb'
/tmp/ccVROLo2.s:75: Error: unsupported instruction `vpaddsw'
/tmp/ccVROLo2.s:86: Error: unsupported instruction `vpaddsw'
/tmp/ccVROLo2.s:97: Error: unsupported instruction `vpsubsb'
/tmp/ccVROLo2.s:108: Error: unsupported instruction `vpsubsb'
/tmp/ccVROLo2.s:119: Error: unsupported instruction `vpsubsw'
/tmp/ccVROLo2.s:130: Error: unsupported instruction `vpsubsw'
/tmp/ccVROLo2.s:141: Error: unsupported instruction `vpaddusb'
/tmp/ccVROLo2.s:152: Error: unsupported instruction `vpaddusb'
/tmp/ccVROLo2.s:163: Error: unsupported instruction `vpaddusw'
/tmp/ccVROLo2.s:174: Error: unsupported instruction `vpaddusw'
/tmp/ccVROLo2.s:185: Error: unsupported instruction `vpsubusb'
/tmp/ccVROLo2.s:196: Error: unsupported instruction `vpsubusb'
/tmp/ccVROLo2.s:207: Error: unsupported instruction `vpsubusw'
/tmp/ccVROLo2.s:218: Error: unsupported instruction `vpsubusw'
/tmp/ccVROLo2.s:258: Error: unsupported instruction `vpaddusw'
/tmp/ccVROLo2.s:269: Error: unsupported instruction `vpavgb'
/tmp/ccVROLo2.s:280: Error: unsupported instruction `vpavgb'
/tmp/ccVROLo2.s:291: Error: unsupported instruction `vpavgw'
/tmp/ccVROLo2.s:302: Error: unsupported instruction `vpavgw'
/tmp/ccVROLo2.s:475: Error: unsupported instruction `vpmovsxbw'
/tmp/ccVROLo2.s:486: Error: unsupported instruction `vpmovsxbw'
/tmp/ccVROLo2.s:497: Error: unsupported instruction `vpmovzxbw'
/tmp/ccVROLo2.s:508: Error: unsupported instruction `vpmovzxbw'
/tmp/ccVROLo2.s:548: Error: unsupported instruction `vpmulhuw'
/tmp/ccVROLo2.s:559: Error: unsupported instruction `vpmulhuw'
/tmp/ccVROLo2.s:570: Error: unsupported instruction `vpmulhw'
/tmp/ccVROLo2.s:581: Error: unsupported instruction `vpmulhw'
/tmp/ccVROLo2.s:592: Error: unsupported instruction `vpsadbw'
/tmp/ccVROLo2.s:603: Error: unsupported instruction `vpsadbw'
/tmp/ccVROLo2.s:643: Error: unsupported instruction `vpshufhw'
/tmp/ccVROLo2.s:654: Error: unsupported instruction `vpshufhw'
/tmp/ccVROLo2.s:665: Error: unsupported instruction `vpshuflw'
/tmp/ccVROLo2.s:676: Error: unsupported instruction `vpshuflw'
/tmp/ccVROLo2.s:687: Error: unsupported instruction `vpslldq'
/tmp/ccVROLo2.s:698: Error: unsupported instruction `vpslldq'
/tmp/ccVROLo2.s:709: Error: unsupported instruction `vpsrldq'
/tmp/ccVROLo2.s:720: Error: unsupported instruction `vpsrldq'
/tmp/ccVROLo2.s:899: Error: unsupported instruction `vpunpckhbw'
/tmp/ccVROLo2.s:910: Error: unsupported instruction `vpunpckhbw'
/tmp/ccVROLo2.s:921: Error: unsupported instruction `vpunpckhwd'
/tmp/ccVROLo2.s:932: Error: unsupported instruction `vpunpckhwd'
/tmp/ccVROLo2.s:943: Error: unsupported instruction `vpunpcklbw'
/tmp/ccVROLo2.s:954: Error: unsupported instruction `vpunpcklbw'
/tmp/ccVROLo2.s:965: Error: unsupported instruction `vpunpcklwd'
/tmp/ccVROLo2.s:976: Error: unsupported instruction `vpunpcklwd'

2021-03-12  Jakub Jelinek  <jakub@redhat.com>

	PR target/99321
	* config/i386/constraints.md (YW): New internal constraint.
	* config/i386/sse.md (v_Yw): Add V4TI, V2TI, V1TI and TI cases.
	(*<sse2_avx2>_<insn><mode>3<mask_name>,
	*<sse2_avx2>_uavg<mode>3<mask_name>, *abs<mode>2,
	*<s>mul<mode>3_highpart<mask_name>): Use <v_Yw> instead of v in
	constraints.
	(<sse2_avx2>_psadbw): Use YW instead of v in constraints.
	(*avx2_pmaddwd, *sse2_pmaddwd, *<code>v8hi3, *<code>v16qi3,
	avx2_pmaddubsw256, ssse3_pmaddubsw128): Merge last two alternatives
	into one, use Yw instead of former x,v.
	(ashr<mode>3, <insn><mode>3): Use <v_Yw> instead of x in constraints of
	the last alternative.
	(<sse2_avx2>_packsswb<mask_name>, <sse2_avx2>_packssdw<mask_name>,
	<sse2_avx2>_packuswb<mask_name>, <sse4_1_avx2>_packusdw<mask_name>,
	*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>, <ssse3_avx2>_palignr<mode>,
	<ssse3_avx2>_pshufb<mode>3<mask_name>): Merge last two alternatives
	into one, use <v_Yw> instead of former x,v.
	(avx2_interleave_highv32qi<mask_name>,
	vec_interleave_highv16qi<mask_name>): Use Yw instead of v in
	constraints.  Add && <mask_avx512bw_condition> to condition.
	(avx2_interleave_lowv32qi<mask_name>,
	vec_interleave_lowv16qi<mask_name>,
	avx2_interleave_highv16hi<mask_name>,
	vec_interleave_highv8hi<mask_name>,
	avx2_interleave_lowv16hi<mask_name>, vec_interleave_lowv8hi<mask_name>,
	avx2_pshuflw_1<mask_name>, sse2_pshuflw_1<mask_name>,
	avx2_pshufhw_1<mask_name>, sse2_pshufhw_1<mask_name>,
	avx2_<code>v16qiv16hi2<mask_name>, sse4_1_<code>v8qiv8hi2<mask_name>,
	*sse4_1_<code>v8qiv8hi2<mask_name>_1, <sse2_avx2>_<insn><mode>3): Use
	Yw instead of v in constraints.
	* config/i386/mmx.md (Yv_Yw): New define_mode_attr.
	(*mmx_<insn><mode>3, mmx_ashr<mode>3, mmx_<insn><mode>3): Use <Yv_Yw>
	instead of Yv in constraints.
	(*mmx_<insn><mode>3, *mmx_mulv4hi3, *mmx_smulv4hi3_highpart,
	*mmx_umulv4hi3_highpart, *mmx_pmaddwd, *mmx_<code>v4hi3,
	*mmx_<code>v8qi3, mmx_pack<s_trunsuffix>swb, mmx_packssdw,
	mmx_punpckhbw, mmx_punpcklbw, mmx_punpckhwd, mmx_punpcklwd,
	*mmx_uavgv8qi3, *mmx_uavgv4hi3, mmx_psadbw): Use Yw instead of Yv in
	constraints.
	(*mmx_pinsrw, *mmx_pinsrb, *mmx_pextrw, *mmx_pextrw_zext, *mmx_pextrb,
	*mmx_pextrb_zext): Use YW instead of Yv in constraints.
	(*mmx_eq<mode>3, mmx_gt<mode>3): Use x instead of Yv in constraints.
	(mmx_andnot<mode>3, *mmx_<code><mode>3): Split last alternative into
	two, one with just x, another isa avx512vl with v.

	* gcc.target/i386/avx512vl-pr99321-2.c: New test.

build_cxx_call calls convert_from_reference at the end, so if an immediate
function returns a reference, we were constant evaluating not just that
call, but that call wrapped in an INDIRECT_REF.  That unfortunately means
it can constant evaluate to something non-addressable, so if code later
needs to take its address it will fail.

The following patch fixes that by undoing the convert_from_reference
wrapping for the cxx_constant_value evaluation and readdding it ad the end.

2021-03-12  Jakub Jelinek  <jakub@redhat.com>

	PR c++/99507
	* call.c (build_over_call): For immediate evaluation of functions
	that return references, undo convert_from_reference effects before
	calling cxx_constant_value and call convert_from_reference
	afterwards.

	* g++.dg/cpp2a/consteval19.C: New test.

gcc/ChangeLog:

	* doc/invoke.texi: Add missing param documentation.

contrib/ChangeLog:

	* gcc-changelog/git_commit.py: Allow deletion of ChangeLog
	files.
	* gcc-changelog/setup.cfg: Set line limit to 120 characters.
	* gcc-changelog/test_email.py: Add test.
	* gcc-changelog/test_patches.txt: Likewise.
	* gcc-changelog/git_email.py: Fix parsing of deleted files.

The compiler generally doesn't create a temporary for an expression
that is a variable, because it's normally valid to simply reload the
value from the variable.  However, if the variable is in the heap,
then loading the value is a pointer indirection.  The process of
creating GCC IR can cause the variable load and the pointer
indirection to be split, such that the second evaluation only does the
pointer indirection.  If there are conditionals in between the two
uses, this can cause the second use to load the pointer from an
uninitialized register.

Avoid this by introducing a new Expression method that returns whether
it is safe to evaluate an expression multiple times, and use it
everywhere.

The test case is https://golang.org/cl/300789.

Fixes golang/go#44383

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/300809

The analyzer builds an exploded graph of (point,state) pairs and when
it finds a problem, records a diagnostic at the relevant exploded node.
Once it has finished exploring the graph, the analyzer needs to generate
the shortest feasible path through the graph to each diagnostic's node.
This is used:
- for rejecting diagnostics that are infeasible (due to impossible sets
  of constraints),
- for use in determining which diagnostic to use in each deduplication
  set (the one with the shortest path), and
- for building checker_paths for the "winning" diagnostics, giving a
  list of events

Prior to this patch the analyzer simply found the shortest path to the
node, and then checked it for feasibility, which could lead to falsely
rejecting diagnostics: "the shortest path, if feasible" is not the same
as "the shortest feasible path" (PR analyzer/96374).
An example is PR analyzer/93355, where this issue causes the analyzer
to fail to emit a leak warning for a missing fclose on an error-handling
path in intl/localealias.c.

This patch implements a new algorithm for finding the shortest feasible
path to an exploded node: instead of simply finding the shortest path,
the new algorithm uses a worklist to iteratively build a tree of path
prefixes, which are feasible paths by construction, until a path to the
target node is found.  The worklist is prioritized, so that the first
feasible path discovered is the shortest possible feasible path.  The
algorithm continues trying paths until the target node is reached or a
limit is exceeded, in which case the diagnostic is treated as being
infeasible (which could still be a false negative, but is much less
likely to happen than before).  Iteratively building a tree of paths
allows for work to be reused, and the tree can be dumped in .dot form
(via a new -fdump-analyzer-feasibility option), making it much easier to
debug compared to other approaches I tried.

Doing so fixes the missing leak warning for PR analyzer/93355 and
various other test cases.

Testing:
- I manually verified that the behavior is determistic using 50 builds
  of pr93355-localealias.c.  All dumps were identical.
- I manually verified that it still builds with --disable-analyzer.
- Lightly tested with valgrind; no additional issues.
- Lightly performance tested, showing a slight speed regression to the
  analyzer relative to before the patch, but correctness for this issue
  is more important than the slight performance hit for the analyzer.

gcc/ChangeLog:
	PR analyzer/96374
	* Makefile.in (ANALYZER_OBJS): Add analyzer/feasible-graph.o and
	analyzer/trimmed-graph.o.
	* doc/analyzer.texi (Analyzer Paths): Rewrite description of
	feasibility checking to reflect new implementation.
	* doc/invoke.texi (-fdump-analyzer-feasibility): Document new
	option.
	* shortest-paths.h (shortest_paths::get_shortest_distance): New.

gcc/analyzer/ChangeLog:
	PR analyzer/96374
	* analyzer.opt (-param=analyzer-max-infeasible-edges=): New param.
	(fdump-analyzer-feasibility): New flag.
	* diagnostic-manager.cc: Include "analyzer/trimmed-graph.h" and
	"analyzer/feasible-graph.h".
	(epath_finder::epath_finder): Convert m_sep to a pointer and
	only create it if !flag_analyzer_feasibility.
	(epath_finder::~epath_finder): New.
	(epath_finder::m_sep): Convert to a pointer.
	(epath_finder::get_best_epath): Add param "diag_idx" and use it
	when logging.  Rather than finding the shortest path and then
	checking feasibility, instead use explore_feasible_paths unless
	!flag_analyzer_feasibility, in which case simply use the shortest
	path, and note if it is infeasible.  Update for m_sep becoming a
	pointer.
	(class feasible_worklist): New.
	(epath_finder::explore_feasible_paths): New.
	(epath_finder::process_worklist_item): New.
	(class dump_eg_with_shortest_path): New.
	(epath_finder::dump_trimmed_graph): New.
	(epath_finder::dump_feasible_graph): New.
	(saved_diagnostic::saved_diagnostic): Add "idx" param, using it
	on new field m_idx.
	(saved_diagnostic::to_json): Dump m_idx.
	(saved_diagnostic::calc_best_epath): Pass m_idx to get_best_epath.
	Remove assertion that m_problem was set when m_best_epath is NULL.
	(diagnostic_manager::add_diagnostic): Pass an index when created
	saved_diagnostic instances.
	* diagnostic-manager.h (saved_diagnostic::saved_diagnostic): Add
	"idx" param.
	(saved_diagnostic::get_index): New accessor.
	(saved_diagnostic::m_idx): New field.
	* engine.cc (exploded_node::dump_dot): Call args.dump_extra_info.
	Move code to...
	(exploded_node::dump_processed_stmts): ...this new function and...
	(exploded_node::dump_saved_diagnostics): ...this new function.
	Add index of each diagnostic.
	(exploded_edge::dump_dot):  Move bulk of code to...
	(exploded_edge::dump_dot_label): ...this new function.
	* exploded-graph.h (eg_traits::dump_args_t::dump_extra_info): New
	vfunc.
	(exploded_node::dump_processed_stmts): New decl.
	(exploded_node::dump_saved_diagnostics): New decl.
	(exploded_edge::dump_dot_label): New decl.
	* feasible-graph.cc: New file.
	* feasible-graph.h: New file.
	* trimmed-graph.cc: New file.
	* trimmed-graph.h: New file.

gcc/testsuite/ChangeLog:
	PR analyzer/96374
	* gcc.dg/analyzer/dot-output.c: Add -fdump-analyzer-feasibility
	to options.
	* gcc.dg/analyzer/feasibility-1.c (test_6): Remove xfail.
	(test_7): New.
	* gcc.dg/analyzer/pr93355-localealias-feasibility-2.c: Remove xfail.
	* gcc.dg/analyzer/pr93355-localealias-feasibility-3.c: Remove xfails.
	* gcc.dg/analyzer/pr93355-localealias-feasibility.c: Remove
	-fno-analyzer-feasibility from options.
	* gcc.dg/analyzer/pr93355-localealias.c: Likewise.
	* gcc.dg/analyzer/unknown-fns-4.c: Remove xfail.

This patch generalizes shortest-path.h so that it can be used to
find the shortest path from each node to a given target node (on top
of the existing support for finding the shortest path from a given
origin node to each node).

I've marked this as "analyzer" as this is the only code using
shortest-paths.h.

This patch is required by followup work to fix PR analyzer/96374.

gcc/analyzer/ChangeLog:
	* diagnostic-manager.cc (epath_finder::epath_finder):
	Update shortest_paths init for new param.

gcc/ChangeLog:
	* digraph.cc (selftest::test_shortest_paths): Update
	shortest_paths init for new param.  Add test of
	SPS_TO_GIVEN_TARGET.
	* shortest-paths.h (enum shortest_path_sense): New.
	(shortest_paths::shortest_paths): Add "sense" param.
	Update for renamings.  Generalize to use "sense" param.
	(shortest_paths::get_shortest_path): Rename param.
	(shortest_paths::m_sense): New field.
	(shortest_paths::m_prev): Rename...
	(shortest_paths::m_best_edge): ...to this.
	(shortest_paths::get_shortest_path): Update for renamings.
	Conditionalize flipping of path on sense of traversal.

This bulletproofs the shortest_paths code against unreachable nodes,
gracefully handling them, rather than failing an assertion.

I've marked this as "analyzer" as this is the only code using
shortest-paths.h.

This patch is required by followup work to fix PR analyzer/96374.

gcc/ChangeLog:
	* digraph.cc (selftest::test_shortest_paths): Add test coverage
	for paths from B and C.
	* shortest-paths.h (shortest_paths::shortest_paths): Handle
	unreachable nodes, rather than asserting.

This implements a minimal integer class type that emulates 128-bit
unsigned arithmetic using a pair of 64-bit integers, which the
floating-point std::to_chars implementation then uses as a drop-in
replacement for unsigned __int128 on targets that lack the latter.
After this patch, we now fully support formatting of large long double
types on such targets.

Since Ryu performs 128-bit division/modulus only by 2, 5 and 10, this
integer class type supports only these divisors rather than general
division/modulus.

libstdc++-v3/ChangeLog:

	* src/c++17/floating_to_chars.cc: Simplify the file as if
	__SIZEOF_INT128__ is always defined.
	[!defined __SIZEOF_INT128__]: Include "uint128_t.h".  Define
	a base-10 to_chars overload for the uint128_t class type.
	* src/c++17/uint128_t.h: New file.
	* testsuite/20_util/to_chars/long_double.cc: No longer expect an
	execution FAIL on targets that have a large long double type
	but lack __int128.

This makes Ryu consistently use the uint128_t alias that's defined in
floating_to_chars.cc.

libstdc++-v3/ChangeLog:

	* src/c++17/ryu/LOCAL_PATCHES: Update.
	* src/c++17/ryu/d2s_intrinsics.h: Don't define uint128_t.
	* src/c++17/ryu/generic_128.h: Likewise.
	* src/c++17/ryu/ryu_generic_128.h (struct floating_decimal_128):
	Use uint128_t instead of __uint128_t.
	(generic_binary_to_decimal): Likewise.

This file keeps track of the local modifications we've made to our
copy of Ryu.

libstdc++-v3/ChangeLog:

	* src/c++17/ryu/LOCAL_PATCHES: New file.

Since Ryu has the alias uint128_t for this same purpose, it seems best
for us to use this name as well, so as to minimize the amount of local
modifications we'd need to make to our copy of Ryu.  (In a subsequent
patch, we're going to remove Ryu's aliases so that it uses this one
defined in floating_to_chars.cc.)

libstdc++-v3/ChangeLog:

	* src/c++17/floating_to_chars.cc (uint128_t): New conditionally
	defined alias of unsigned __int128.
	(floating_type_traits_binary128::mantissa_t): Use uint128_t
	instead of unsigned __int128.
	(floating_type_traits<long double>::mantissa_t)
	[LONG_DOUBLE_KIND == LDK_IBM128]: Likewise.
	(get_ieee_repr): Likewise.  Make casts from uint_t to mantissa_t
	and uint32_t explicit.  Simplify the extraction of mantissa,
	exponent and sign bit.

GCC on AIX generates thread local uninitialized data in the common section,
which could conflict with another module.

This patch changes the code generation to place static uninitialized
thread local data into the local common section specified with .lcomm.
This change also removes the need to create a file-local name for the TBSS
data.

gcc/ChangeLog:

2021-03-11  David Edelsohn  <dje.gcc@gmail.com>

	PR target/99094
	* config/rs6000/rs6000.c (rs6000_xcoff_file_start): Don't create
	xcoff_tbss_section_name.
	* config/rs6000/xcoff.h (ASM_OUTPUT_TLS_COMMON): Use .lcomm.
	* xcoffout.c (xcoff_tbss_section_name): Delete.
	* xcoffout.h (xcoff_tbss_section_name): Delete.

This was a simple thinko about which object held the reference to the
binding vector.  I also noticed stale code in the tree dumper, as I
recently removed the flags from a lazy number.

	PR c++/99248
	gcc/cp/
	* name-lookup.c (lookup_elaborated_type_1): Access slot not bind
	when there's a binding vector.
	* ptree.c (cxx_print_xnode): Lazy flags are no longer a thing.
	gcc/testsuite/
	* g++.dg/modules/pr99248.h: New.
	* g++.dg/modules/pr99248_a.H: New.
	* g++.dg/modules/pr99248_b.H: New.

The standard only specifies that barrier::arrival_token is a move
constructible and move assignable type. We originally used a scoped enum
type, but that means we do not diagnose non-portable code that makes
copies of arrival tokens (or compares them for equality, or uses them as
keys in map!) This wraps the enum in a move-only class type, so that
users are forced to pass it correctly.

The move constructor and move assignment operator of the new class do
not zero out the moved-from token, as that would add additional
instructions. That means that passing a moved-from token will work with
our implementation, despite being a bug in the user code. We could
consider doing that zeroing out in debug mode.

libstdc++-v3/ChangeLog:

	* include/std/barrier (barrier::arrival_token): New move-only
	class that encapsulates the underlying token value.

The find_type helper function sometimes results in "class X::name" and
lookup for that fails. For more details see "Problem 1" in
https://gcc.gnu.org/pipermail/libstdc++/2021-March/052132.html and the
example at https://sourceware.org/bugzilla/show_bug.cgi?id=27510#c2

This patch replaces typ.unqualified() with typ.tag, which is never
qualified, and will never include the 'class' or 'struct' keywords.
Using the .tag attribute should be safe here because we know we are
looking at a class type and we've already used strip_typedefs().

libstdc++-v3/ChangeLog:

	* python/libstdcxx/v6/printers.py (find_type): Use tag attribute
	instead of unqualified() method.

As Lewis Baker wrote in the PR:

> The 'fetch_sub()' operation in _M_release_ownership() should be using
> memory_order::acq_rel instead of memory_order::release. The use of
> 'release' only is insufficient as it does not synchronise with any
> corresponding 'acquire' operation.

> With the current implementation, it's possible that a prior write to
> one of the _M_value or _M_head data-members by a thread releasing the
> second-to-last reference might not be visible to another thread that
> releases the last reference and frees the memory, resulting in
> potential write to freed memory.

This simply changes the memory order to acq_rel as suggested.

libstdc++-v3/ChangeLog:

	PR libstdc++/99537
	* include/std/stop_token (_Stop_state_t::_M_release_ownership):
	Use acq_rel memory ordering.

Contrary to what POSIX says, some directory operations on MacOS can fail
with EPERM instead of EACCES, so we need to handle both.

libstdc++-v3/ChangeLog:

	PR libstdc++/99537
	* src/c++17/fs_dir.cc (recursive_directory_iterator): Use new
	helper function to check for permission denied errors.
	* src/filesystem/dir.cc (recursive_directory_iterator):
	Likewise.
	* src/filesystem/dir-common.h (is_permission_denied_error): New
	helper function.

This avoids a false positive -Wmaybe-uninitialized warning, by
initializing _M_saved on construction.

libstdc++-v3/ChangeLog:

	PR libstdc++/99536
	* include/bits/random.h (normal_distribution): Use
	default-initializer for _M_saved and _M_saved_available.

This turned out to be an existing problem, which had been hidden by
other bugs.  Templated members of templated classes can end up
instantiating the template itself, and we were not handling the
mergeableness of that correctly.

	PR c++/99528
	gcc/cp/
	* module.cc (enum merge_kind): Delete MK_type_tmpl_spec,
	MK_decl_tmpl_spec.
	(trees_in::decl_value): Adjust add_mergeable_specialization call.
	(trees_out::get_merge_kind): Adjust detecting a partial template
	instantiation.
	(trees_out::key_mergeable): Adjust handling same.
	(trees_in::key_mergeabvle): Likewise.
	gcc/testsuite/
	* g++.dg/modules/pr99528.h: New.
	* g++.dg/modules/pr99528_a.H: New.
	* g++.dg/modules/pr99528_b.H: New.
	* g++.dg/modules/pr99528_c.C: New.

/
	* MAINTAINERS: Update entries for a few ex-ImgTec employees

ChangeLog:

	* Makefile.tpl: The change was done Makefile.in which
	is generated file.

Checking the number of pluses is unreliable since the vector size
isn't known.  Instead see that the unwanted scalar compute is not
there.

2021-03-11  Richard Biener  <rguenther@suse.de>

	PR testsuite/98245
	* gcc.dg/vect/bb-slp-46.c: Scan for the scalar compute
	instead of verifying the total number of adds.

While we could at least vectorize it on targets which support
re-alignment tokens we fail to do this because of imperfections in
alignment analysis.  XFAIL when the HW cannot deal with misaligned
vector accesses for now.

2021-03-11  Richard Biener  <rguenther@suse.de>

	PR testsuite/97494
	* gcc.dg/vect/pr97428.c: XFAIL on !vect_hw_misalign.

This is a missed optimization due to bogus alignment analysis.

2021-03-11  Richard Biener  <rguenther@suse.de>

	PR testsuite/97494
	* gcc.dg/vect/vect-complex-5.c: XFAIL on !vect_hw_misalign.

As reported in the PR all powerpc64 targets fail

FAIL: gcc.dg/vect/slp-21.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2

because like on arm we now vectorize 4 opportunities.  This adjusts
the testcase to follow the arm example.

2021-03-11  Richard Biener  <rguenther@suse.de>

	PR testsuite/97494
	* gcc.dg/vect/slp-21.c: Adjust for powerpc64*-*-*.

This makes sure to dump SSA names without identifier in the
declaration part of a function dump.  While we dump the
anonymous variable decls the SSA names referencing them appear
without a clear reference as to what anonymous variable is used
(_3 vs. D.1234).

2021-03-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99523
	* tree-cfg.c (dump_function_to_file): Dump SSA names
	w/o identifier to the decls section as well, not only those
	without a VAR_DECL.

The following testcase is miscompiled, because IPA-ICF considers the two
functions identical.  They aren't, the types of the .VEC_CONVERT call
lhs is different.  But for calls to internal functions, there is no
fntype nor callee with a function type to compare, so all we compare
is just the ifn, arguments and some call flags.

The following patch fixes it by checking the internal fn calls like e.g. gimple
assignments where the type of the lhs is checked too.

2021-03-11  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/99517
	* ipa-icf-gimple.c (func_checker::compare_gimple_call): For internal
	function calls with lhs fail if the lhs don't have compatible types.

	* gcc.target/i386/avx2-pr99517-1.c: New test.
	* gcc.target/i386/avx2-pr99517-2.c: New test.

Beware, tm.texi doesn't tell the whole story: a defined
HARD_FRAME_POINTER_REGNUM (different to FRAME_POINTER_REGNUM) is
supposed to make work easier for reload, being able to easily
tell actual frame-pointer-related addresses from those that
happen to use the same register or something to that effect.

On reasonable code the performance effect is barely measurable.

Looking at libgcc changes for -march=v10, the effect (where
noticeable) is mostly indeterminate churn.  Instances where it's
not just insns moved around at no obvious effect: one more insn
for addvdi3, subvdi3; two insns more in floatdisf; three insns
shorter fixunsdfdi.  Some of those seem related to pairing r8
with r9.  The only effect on coremark is an infinitesimal
positive effect from a three(!) cycles total (from the 15 calls)
faster execution paths in vfprintf_r.  Local microbenchmarks
give similar results.  With that in mind and not forgetting that
expectations in the register allocator and reload leaning
towards HARD_FRAME_POINTER_REGNUM defined (and different to)
FRAME_POINTER_REGNUM or to wit, "all the kids do it", why not.
Note that the offset at elimination really is 0.

gcc:
	* config/cris/cris.h (HARD_FRAME_POINTER_REGNUM): Define.
	Change FRAME_POINTER_REGNUM to correspond to a new faked
	register faked_fp, part of GENNONACR_REGS like faked_ap.
	(CRIS_FAKED_REGS_CONTENTS): New helper macro.
	(FIRST_PSEUDO_REGISTER, FIXED_REGISTERS, CALL_USED_REGISTERS):
	(REG_ALLOC_ORDER, REG_CLASS_CONTENTS, REGNO_OK_FOR_BASE_P)
	(ELIMINABLE_REGS, REGISTER_NAMES): Adjust accordingly.
	* config/cris/cris.md (CRIS_FP_REGNUM): Renumber to new faked
	register.
	(CRIS_REAL_FP_REGNUM): New constant.
	* config/cris/cris.c (cris_reg_saved_in_regsave_area): Check
	for HARD_FRAME_POINTER_REGNUM instead of FRAME_POINTER_REGNUM.
	(cris_initial_elimination_offset): Handle elimination changes
	to HARD_FRAME_POINTER_REGNUM instead of FRAME_POINTER_REGNUM
	and add one from FRAME_POINTER_REGNUM to
	HARD_FRAME_POINTER_REGNUM.
	(cris_expand_prologue, cris_expand_epilogue): Emit code for
	hard_frame_pointer_rtx instead of frame_pointer_rtx.

AIX word-aligns floating point doubles.  This behavior also extends to
double _Complex, which had been overlooked when compiler support for
double _Complex was added.

This patch adds DCmode to the modes whose alignment is adjusted and
adds a testcase to confirm the correct alignment.

gcc/ChangeLog:

2021-03-10  David Edelsohn  <dje.gcc@gmail.com>

	PR target/99492
	* config/rs6000/aix.h (ADJUST_FIELD_ALIGN): Add check for DCmode.
	* config/rs6000/rs6000.c (rs6000_special_round_type_align): Same.

gcc/testsuite/ChangeLog:

2021-03-10  David Edelsohn  <dje.gcc@gmail.com>

	PR target/99492
	* gcc.target/powerpc/pr99492.c: New testcase.

A character variable appearing as a data statement object cannot
be automatic, thus it shall have constant length.

gcc/fortran/ChangeLog:

	PR fortran/99205
	* data.c (gfc_assign_data_value): Reject non-constant character
	length for lvalue.
	* trans-array.c (gfc_conv_array_initializer): Restrict loop to
	elements which are defined to avoid NULL pointer dereference.

gcc/testsuite/ChangeLog:

	PR fortran/99205
	* gfortran.dg/data_char_4.f90: New test.
	* gfortran.dg/data_char_5.f90: New test.

Using CONSTRAINT__UNKNOWN was a bad idea, although it triggered a lot
hidden bugs.  It is better to use X instead of empty constraint.

gcc/ChangeLog:

	PR target/99422
	* lra-constraints.c (process_address_1): Don't check unknown
	constraint, use X for empty constraint.

It needs the int128 selector because it uses __int128, and the lp64
selector is the best we can do for -mcmodel=.

2021-03-10  Segher Boessenkool  <segher@kernel.crashing.org>

gcc/testsuite/
	* gcc.target/powerpc/pr98959.c: Add int128 and lp64 selectors.

gcc/fortran/ChangeLog:

	* intrinsic.texi (MIN): Correct 'maximum' to 'minimum'.

My reworking of pending-entity loading introduced a GC problem.  The
post-load processing needs to inhibit GCs (that would otherwise occur
in clone_decl).  That wasn't happening on one code path, leading to
dangling pointers in the active call frames.

	PR c++/99423
	gcc/cp/
	* module.cc (post_load_processing): Assert not gcable.
	(laxy_load_pendings): Extend no-gc region around
	post_load_processing.
	gcc/testsuite/
	* g++.dg/modules/pr99423_a.H: New.
	* g++.dg/modules/pr99423_b.H: New.