- 11 Jul, 2017 2 commits
- 30 Jun, 2017 12 commits
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H.J. Lu authored
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Georg-Johann Lay authored
PR gas/21683 include * opcode/avr.h (AVR_INSN): Add one for __gcc_isr. gas * doc/c-avr.texi (AVR Options) <-mgcc-isr>: Document it. (AVR Pseudo Instructions): New node. * config/tc-avr.h (md_pre_output_hook): Define to avr_pre_output_hook. (md_undefined_symbol): Define to avr_undefined_symbol. (avr_pre_output_hook, avr_undefined_symbol): New protos. * config/tc-avr.c (struc-symbol.h): Include it. (ISR_CHUNK_Done, ISR_CHUNK_Prologue, ISR_CHUNK_Epilogue): New enums. (avr_isr, avr_gccisr_opcode) (avr_no_sreg_hash, avr_no_sreg): New static variables. (avr_opt_s) <have_gccisr>: Add field. (avr_opt): Add initializer for have_gccisr. (enum options) <OPTION_HAVE_GCCISR>: Add enum. (md_longopts) <"mgcc-isr">: Add entry. (md_show_usage): Document -mgcc-isr. (md_parse_option) [OPTION_HAVE_GCCISR]: Handle it. (md_undefined_symbol): Remove. (avr_undefined_symbol, avr_pre_output_hook): New fuctions. (md_begin) <avr_no_sreg_hash, avr_gccisr_opcode>: Initialize them. (avr_operand) <pregno>: Add argument and set *pregno if function is called for a register constraint. [N]: Handle constraint. (avr_operands) <avr_operand>: Pass 5th parameter to calls. [avr_opt.have_gccisr]: Call avr_update_gccisr. Call avr_gccisr_operands instead of avr_operands. (avr_update_gccisr, avr_emit_insn, avr_patch_gccisr_frag) (avr_gccisr_operands, avr_check_gccisr_done): New static functions. * testsuite/gas/avr/gccisr-01.d: New test. * testsuite/gas/avr/gccisr-01.s: New test. * testsuite/gas/avr/gccisr-02.d: New test. * testsuite/gas/avr/gccisr-02.s: New test. * testsuite/gas/avr/gccisr-03.d: New test. * testsuite/gas/avr/gccisr-03.s: New test. -
Maciej W. Rozycki authored
Complement commit a92713e6 ("Preparse MIPS instructions into tokens"), <https://sourceware.org/ml/binutils/2013-07/msg00143.html>, and update `match_float_constant' and `match_operand' function descriptions according to semantics changes. gas/ * config/tc-mips.c (match_float_constant): Update description. (match_operand): Likewise.
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Maciej W. Rozycki authored
Correct an issue introduced with commit 7361da2c ("Add support for MIPS R6.") and move the LSA and DLSA instructions back to the MSA ASE instruction block in the regular MIPS opcode table. Adjust formatting around the "MIPS r6" heading. opcodes/ * mips-opc.c (mips_builtin_opcodes): Move "lsa" and "dlsa" entries to the MSA ASE instruction block.
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Sergio Durigan Junior authored
My last commit fixed a regression that happened when using inline/multi-line commands for Python/Compile/Guile, but introduced another regression: it is now not possible to use aliases for the commands mentioned above. The fix is to almost revert the change I've made and go back to using the 'struct cmd_list_element *', but at the same time make sure that we advance the 'cmd_name' variable past all the whitespace characters after the command name. If, after skipping the whitespace, we encounter a '\0', it means that the command is not inline. Otherwise, it is. This patch also expands the testcase in order to check for aliases and for trailing whitespace after the command name. gdb/ChangeLog: 2017-06-30 Sergio Durigan Junior <sergiodj@redhat.com> Pedro Alves <palves@redhat.com> PR cli/21688 * cli/cli-script.c (command_name_equals_not_inline): Remove function. (process_next_line): New variable 'inline_cmd'. Adjust 'if' clauses for "python", "compile" and "guile" to use 'command_name_equals' and check for '!inline_cmd'. gdb/testsuite/ChangeLog: 2017-06-30 Sergio Durigan Junior <sergiodj@redhat.com> PR cli/21688 * gdb.python/py-cmd.exp (test_python_inline_or_multiline): Add new tests for alias commands and trailing whitespace.
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Sergio Durigan Junior authored
This bug is a regression caused by the following commit: 604c4576 is the first bad commit commit 604c4576 Author: Jerome Guitton <guitton@adacore.com> Date: Tue Jan 10 15:15:53 2017 +0100 The problem happens because, on cli/cli-script.c:process_next_line, GDB is not using the command line string to identify which command to run, but it instead using the 'struct cmd_list_element *' that is obtained by using the mentioned string. The problem with that is that the 'struct cmd_list_element *' doesn't have any information on whether the command issued by the user is a multi-line or inline one. A multi-line command is a command that will necessarily be composed of more than 1 line. For example: (gdb) if 1 >python >print ('hello') >end >end As can be seen in the example above, the 'python' command actually "opens" a new command line (represented by the change in the indentation) that will then be used to enter Python code. OTOH, an inline command is a command that is "self-contained" in a single line, for example: (gdb) if 1 >python print ('hello') >end This Python command is a one-liner, and therefore there is no other Python code that can be entered for this same block. There is also no change in the indentation. So, the fix is somewhat simple: we have to revert the change and use the full command line string passed to process_next_line in order to identify whether we're dealing with a multi-line or an inline command. This commit does just that. As can be seen, this regression also affects other languages, like guile or the compile framework. To make things clearer, I decided to create a new helper function responsible for identifying a non-inline command. Testcase is attached. gdb/ChangeLog: 2017-06-30 Sergio Durigan Junior <sergiodj@redhat.com> PR cli/21688 * cli/cli-script.c (command_name_equals_not_inline): New function. (process_next_line): Adjust 'if' clauses for "python", "compile" and "guile" to use command_name_equals_not_inline. gdb/testsuite/ChangeLog: 2017-06-30 Sergio Durigan Junior <sergiodj@redhat.com> PR cli/21688 * gdb.python/py-cmd.exp (test_python_inline_or_multiline): New procedure. Call it.
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Nick Clifton authored
PR binutils/21665 * objdump.c (disassemble_section): Move check for an overlarge section to just before the allocation of memory. Do not check section size against file size, but instead use an arbitrary 2Gb limit. Issue a warning message if the section is too big.
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Maciej W. Rozycki authored
Correct ChangeLog entry for commit 38bf472a ("MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support").
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Maciej W. Rozycki authored
Add support for the base and Virtualization ASE microMIPS instructions as per the architecture specifications[1][2][3][4]. Most of this change by Andrew Bennett. [1] "MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00582, Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit Instructions", p. 340 [2] "microMIPS32 Architecture for Programmers Volume IV-i: Virtualization Module of the microMIPS32 Architecture", MIPS Technologies, Inc., Document Number: MD00848, Revision 1.06, December 10, 2013, Section 6.1 "Overview", pp. 133, 136 [3] "MIPS Architecture for Programmers Volume II-B: The microMIPS64 Instruction Set", MIPS Technologies, Inc., Document Number: MD00594, Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit Instructions", pp. 415, 444 [4] "microMIPS64 Architecture for Programmers Volume IV-i: Virtualization Module of the microMIPS64 Architecture", MIPS Technologies, Inc., Document Number: MD00849, Revision 1.06, December 10, 2013, Section 6.1 "Overview", pp. 134-135, 139-140 binutils/ * NEWS: Mention microMIPS XPA support. opcodes/ * micromips-opc.c (XPA, XPAVZ): New macros. (micromips_opcodes): Add "mfhc0", "mfhgc0", "mthc0" and "mthgc0". gas/ * config/tc-mips.c (mips_ases): Add microMIPS XPA support. * testsuite/gas/mips/micromips@xpa.d: New test. * testsuite/gas/mips/mips.exp: Run the new test. Enable `xpa-virt-err' test for `micromips'. -
Maciej W. Rozycki authored
Add base microMIPS Release 5 ISA support and the ERETNC instruction in particular, as per the architecture specifications[1][2]. Most of this change by Andrew Bennett. References: [1] "MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00582, Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit Instructions", pp. 266-267 [2] "MIPS Architecture for Programmers Volume II-B: The microMIPS64 Instruction Set", MIPS Technologies, Inc., Document Number: MD00594, Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit Instructions", pp. 326-327 binutils/ * NEWS: Mention microMIPS Release 5 ISA support. opcodes/ * micromips-opc.c (I36): New macro. (micromips_opcodes): Add "eretnc". gas/ * testsuite/gas/mips/micromips@r5.d: New test. * testsuite/gas/mips/mips.exp: Run the new test. -
Maciej W. Rozycki authored
Correct a commit 7d64c587 ("Add support for the MIPS eXtended Physical Address (XPA) ASE.") bug, causing XPA base and Virtualization ASE instructions to be wrongly always enabled with the selection of the MIPS32r2 or higher ISA. For example this source assembles successfully as shown below: $ cat xpa.s mfhc0 $2, $1 $ as -32 -mips32 -o xpa.o xpa.s xpa.s: Assembler messages: xpa.s:1: Error: opcode not supported on this processor: mips32 (mips32) `mfhc0 $2,$1' $ as -32 -mips32r2 -o xpa.o xpa.s $ objdump -d xpa.o xpa.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <.text>: 0: 40420800 mfhc0 v0,c0_random ... $ To address this issue remove the I33 (INSN_ISA32R2) marking from all XPA instructions in the opcode table. Additionally, for XPA Virtualization ASE instructions implement an XPAVZ (ASE_XPA_VIRT) combination ASE flag and use it in place of IVIRT|XPA (ASE_VIRT|ASE_XPA). Now the same source is correctly rejected unless the `-mxpa' option is also used: $ as -32 -mips32r2 -o xpa.o xpa.s xpa.s: Assembler messages: xpa.s:1: Error: opcode not supported on this processor: mips32r2 (mips32r2) `mfhc0 $2,$1' $ as -32 -mips32r2 -mxpa -o xpa.o xpa.s $ Add test cases for XPA base and XPA Virtualization ASE instructions. Parts of this change by Andrew Bennett. include/ * opcode/mips.h (ASE_XPA_VIRT): New macro. opcodes/ * mips-dis.c (mips_calculate_combination_ases): Handle the ASE_XPA_VIRT flag. (parse_mips_ase_option): New function. (parse_mips_dis_option): Factor out ASE option handling to the new function. Call `mips_calculate_combination_ases'. * mips-opc.c (XPAVZ): New macro. (mips_builtin_opcodes): Correct ISA and ASE flags for "mfhc0", "mfhgc0", "mthc0" and "mthgc0". gas/ * config/tc-mips.c (mips_set_ase): Handle the ASE_XPA_VIRT flag. * testsuite/gas/mips/xpa.d: Remove `xpa' from `-M' in `objdump' flags. Add `-mvirt' to `as' flags. * testsuite/gas/mips/xpa-err.d: New test. * testsuite/gas/mips/xpa-virt-err.d: New test. * testsuite/gas/mips/xpa-err.l: New stderr output. * testsuite/gas/mips/xpa-virt-err.l: New stderr output. * testsuite/gas/mips/xpa-err.s: New test source. * testsuite/gas/mips/xpa-virt-err.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. binutils/ * testsuite/binutils-all/mips/mips-xpa-virt-1.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt-2.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt-3.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt-4.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new tests.
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GDB Administrator authored
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- 29 Jun, 2017 13 commits
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Maciej W. Rozycki authored
Correct a commit 25499ac7 ("MIPS16e2: Add MIPS16e2 ASE support") disassembler bug with the handling of the ASE_MIPS16E2_MT combination ASE flag, where the calculation uses MIPS ABI Flags directly rather than calculated internal ASE flags. Consequently code does not correctly set the ASE_MIPS16E2_MT flag when the MIPS16e2 ASE flag and the MT ASE flag come from different sources, i.e. one from the BFD chosen and the other one from MIPS ABI Flags. Fix this by using internal ASE_MT and ASE_MIPS16E2 flags in a separate subsequent step, factored out to a dedicated function for use with future combination ASE flags. Adjust the `mips16e2@mips16e2-mt-sub.d' test case accordingly, where the MT flag comes from the BFD selected for the disassembler and the MIPS16e2 flag comes from the ELF binary itself. opcodes/ * mips-dis.c (mips_calculate_combination_ases): New function. (mips_convert_abiflags_ases): Factor out ASE_MIPS16E2_MT calculation to the new function. (set_default_mips_dis_options): Call the new function. gas/ * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: Adjust for the ASE_MIPS16E2_MT flag disassembler fix. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d: Likewise.
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Maciej W. Rozycki authored
Correct a commit 25499ac7 ("MIPS16e2: Add MIPS16e2 ASE support") GAS bug with the handling of the ASE_MIPS16E2_MT combination ASE flag, which is not correctly calculated as `.set nomips16e2' and `.set nomt' pseudo-ops are processed. This leads to code like: $ cat foo.s .set nomt evpe .align 4, 0 $ cat bar.s .set nomips16e2 dvpe .align 4, 0 $ to successfully assemble where it should not: $ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s $ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s $ objdump -m mips:16 -d foo.o foo.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <.text>: 0: f027 6700 evpe ... bar.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <.text>: 0: f026 6700 dvpe ... $ This happens because ASE_MIPS16E2_MT once set in `mips_set_ase' is never cleared. Fix the problem by clearing it there before it is calculated based on the ASE_MT and ASE_MIPS16E2 flags, making assembly fail as expected: $ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s foo.s: Assembler messages: foo.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `evpe' $ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s bar.s: Assembler messages: bar.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `dvpe' $ gas/ * config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT flag before recalculating. * testsuite/gas/mips/mips16e2-mt-err.d: New test. * testsuite/gas/mips/mips16e2-mt-err.l: New stderr output. * testsuite/gas/mips/mips16e2-mt-err.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test.
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Andrew Waterman authored
The dynrelro introduction wasn't implemented quite right for RISC-V, as it didn't consider TLS copy relocs. bfd/ChangeLog 2017-06-29 Andrew Waterman <andrew@sifive.com> * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol): Fix TLS copy relocs. -
Pedro Alves authored
This commit fixes a mismatch between what "print" command completer thinks the command understands, and what the command actually understands. The explicit location options are understood by commands that take (linespecs and) explicit locations as argument. I.e, breakpoint commands, and "list". For example: (gdb) b -source file.c -function my_func So for those commands, it makes sense that the completer completes: "b -sour[TAB]" -> "b -source " "b -functi[TAB]" -> "b -function " etc. However, completion for commands that take expressions (not linespecs/locations) as arguments, such as the "print" command, also completes the explicit location options, even though those switches aren't really understood by these commands. Instead, "-foo" is understood as an expression applying unary minus on a symbol named "foo" (think "print -1"): (gdb) p -func[TAB] (gdb) p -function [RET] No symbol "function" in current context. The patch fixes this by having the expression_completer function bypass the function that completes explicit locations. New regression tests included. gdb/ChangeLog: 2017-06-29 Pedro Alves <palves@redhat.com> * completer.c (expression_completer): Call linespec_location_completer instead of location_completer. gdb/testsuite/ChangeLog: 2017-06-29 Pedro Alves <palves@redhat.com> * gdb.base/printcmds.exp: Add tests.
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Pedro Alves authored
The code in question was introduced by: https://sourceware.com/ml/gdb-patches/2008-06/msg00143.html "The fix is to make sure that the entire expression is passed to expression_completer, then duplicate some logic there in the case where location_completer is called." The logic that was duplicated was much later on removed by the original explicit locations patch: commit 87f0e720 Author: Keith Seitz <keiths@redhat.com> AuthorDate: Tue Aug 11 17:09:36 2015 -0700 Commit: Keith Seitz <keiths@redhat.com> CommitDate: Tue Aug 11 17:09:36 2015 -0700 Explicit locations: add UI features for CLI @@ -688,16 +880,6 @@ complete_line_internal (const char *text, rl_completer_word_break_characters = gdb_completer_file_name_break_characters; } - else if (c->completer == location_completer) - { - /* Commands which complete on locations want to - see the entire argument. */ - for (p = word; - p > tmp_command - && p[-1] != ' ' && p[-1] != '\t'; - p--) - ; - } However this case in expression_completer was left behind. I couldn't come up with a test where this currently makes any difference. gdb/ChangeLog: 2017-06-29 Pedro Alves <palves@redhat.com> * completer.c (expression_completer): Remove code that recomputes 'text' from 'word'.
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Anton Kolesov authored
This patch updates arc-dis.c:parse_disassembler_options to use a macro FOR_EACH_DISASSEMBLER_OPTION, which has been introduced in [1], instead of a homegrown solution to split option string. [1] https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=65b48a81 opcodes/ChangeLog: yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com> * arc-dis.c (parse_disassembler_options): Use FOR_EACH_DISASSEMBLER_OPTION.
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Anton Kolesov authored
There is a bug in handling of cpu=... disassembler option in case there are other options after it, for example, `cpu=EM,dsp'. In this case `EM,dsp' is treated as an option value, and strcasecmp reports is as non-equal to "EM". This is fixed by using disassembler_options_cmp function, which compares string treating `,' the same way as `\0'. This function also solves a problem with option order in parse_option. Previously, if several option had same prefix (e.g. fpud, fpuda), then the longer one should have been compared first, otherwise when longer option is passed it would be treated as a short one, because CONST_STRNEQ ("fpud", "fpuda") would be true. The order of options was correct for ARC, so there were no bugs per se, but with disassembler_option_cmp there is no risk of such a bug being introduced in the future. opcodes/ChangeLog: yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com> * arc-dis.c (parse_option): Use disassembler_options_cmp to compare disassembler option strings. (parse_cpu_option): Likewise. binutils/ChangeLog yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com> * testsuite/binutils-all/arc/double_store.s: New file. * testsuite/binutils-all/arc/objdump.exp: Tests for disassembler options. (do_objfile): New function. (check_assembly): Likewise. -
Yao Qi authored
struct target_desc is used by both GDBserver and IPA, but fields expedite_regs and xmltarget are only used in GDBserver, so this patch wraps these two fields by ifndef IN_PROCESS_AGENT. This patch also changes regformats/regdat.sh to generate .c files in this way too. gdb/gdbserver: 2017-06-29 Yao Qi <yao.qi@linaro.org> * tdesc.h (struct target_desc) [IN_PROCESS_AGENT] <expedite_regs>: Remove. [IN_PROCESS_AGENT] <xmltarget>: Likewise. gdb: 2017-06-29 Yao Qi <yao.qi@linaro.org> * regformats/regdat.sh: Generate code with "ifndef IN_PROCESS_AGENT".
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Egeyar Bagcioglu authored
Prevent sparc backend making symbols dynamic unless they are undefined weak. Use R_SPARC_RELATIVE for the symbols which are not dynamic in PIC. This patch is tested on sparc64-unknown-linux-gnu, no regressions are found. bfd/ChangeLog: 2017-06-29 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com> * elfxx-sparc.c (allocate_dynrelocs): Don't make a symbol dynamic unless it is undefined weak. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Set the flag relative_reloc to direct non-dynamic symbols to R_SPARC_RELATIVE relocation. * elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): If symbol is not dynamic in PIC, abort. -
Jiong Wang authored
This fix is an adaption of the x86-64 PR ld/21402 fix to AArch64. After the generic code deciding one symbol is not dynamic, AArch64 backend only overrides the decision on undefined weak symbols. bfd/ PR ld/21402 * elfnn-aarch64.c (elfNN_aarch64_allocate_dynrelocs): Only make undefined weak symbols into dynamic. (elfNN_aarch64_final_link_relocate): Generate runtime RELATIVE relocation for non-dynamic symbols. (elfNN_aarch64_finish_dynamic_symbol): Add sanity check.
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Jiong Wang authored
There are quite a few duplicated code supporting several GP based relocation types. They are: BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 These relocation types are supposed to be used for large memory model PIC/pic mode under which we will have an initialized GP register points to the base of GOT table, then these relocations are supposed to put the distance between GOT entry and GOT table base address into the related instructions. So, the parameters required to calculate the relocation should be the same as BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 etc, all of them are require the GOT entry address and GOT table base address to perform the relocation. This patch has removed those duplicated code when handling above listed relocation types, grouped them with others as relocation types that are require GOT table base address during performing relocation, reused the existed GOT handling code. The relocation calculation for these types before and after this patch should be identical. bfd/ * elfnn-aarch64.c (aarch64_relocation_aginst_gp_p): New function. (elfNN_aarch64_final_link_relocate): Delete duplicated code for BFD_RELOC_AARCH64_LD64_GOTOFF_LO15, BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC, BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Optimize the support for them.
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Andreas Arnez authored
Newer Linux kernel versions offer two new register sets in support of the z/Architecture's guarded storage facility: NT_S390_GS_CB, the "guarded-storage registers", and NT_S390_GS_BC, the "guarded-storage broadcast control block". This patch adds support for the respective core notes sections to binutils. bfd/ChangeLog: * elf-bfd.h (elfcore_write_s390_gs_cb): Add prototype. (elfcore_write_s390_gs_bc): Likewise. * elf.c (elfcore_grok_s390_gs_cb): New function. (elfcore_grok_s390_gs_bc): New function. (elfcore_grok_note): Call them. (elfcore_write_s390_gs_cb): New function. (elfcore_write_s390_gs_bc): New function. (elfcore_write_register_note): Call them. binutils/ChangeLog: * readelf.c (get_note_type): Add NT_S390_GS_CB and NT_S390_GS_BC. include/ChangeLog: * elf/common.h (NT_S390_GS_CB): New macro. (NT_S390_GS_BC): Likewise.
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GDB Administrator authored
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- 28 Jun, 2017 12 commits
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H.J. Lu authored
Since it is impossible to read beyond the end of normal files, we only need to check archive element size in _bfd_generic_get_section_contents * libbfd.c (_bfd_generic_get_section_contents): Don't call bfd_get_file_size. Check archive element size. (_bfd_generic_get_section_contents_in_window): Likewise.
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H.J. Lu authored
bfd_get_size and bfd_get_file_size should return the unsigned file size. Otherwise they return negative values for file >= 2GB with 32-bit ufile_ptr. bfd/ * bfd-in2.h: Regenerated. * bfdio.c (bfd_get_size): Change return type to ufile_ptr. (bfd_get_file_size): Likewise. binutils/ * objdump.c (dump_relocs_in_section): Cast to ufile_ptr when comparing against bfd_get_file_size return.
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Pedro Alves authored
command.h depends on scoped_restore: extern scoped_restore_tmpl<int> prevent_dont_repeat (void); But doesn't include the corresponding header ("common/scoped_restore.h"). We haven't noticed a problem because utils.h includes scoped_restore.h, and defs.h includes utils.h. However, a patch that makes "symtab.h" include "completer.h", exposed the issue: https://sourceware.org/ml/gdb-patches/2017-06/msg00023.html. Without this fix that would break building all .o files like this: In file included from src/gdb/completer.h:21:0, from src/gdb/symtab.h:28, from src/gdb/language.h:26, from src/gdb/frame.h:72, from src/gdb/gdbarch.h:39, from src/gdb/defs.h:636, from src/gdb/top.c:20: src/gdb/command.h:434:8: error: ‘scoped_restore_tmpl’ does not name a type extern scoped_restore_tmpl<int> prevent_dont_repeat (void); ^ Makefile:1911: recipe for target 'top.o' failed because defs.h includes gdbarch.h before it includes utils.h. gdb/ChangeLog: 2017-06-28 Pedro Alves <palves@redhat.com> * command.h: Include "common/scoped_restore.h". -
Yao Qi authored
We already have macro obstack_grow_str, which is helpful to shorten the code. gdb: 2017-06-28 Yao Qi <yao.qi@linaro.org> * mi/mi-cmd-break.c (mi_argv_to_format): Use obstack_grow_str instead of obstack_grow.
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Nick Clifton authored
* objcopy.c (merge_gnu_build_notes): Add support for version 2 notes. * readelf.c (print_gnu_build_attribute_name): Likewise.
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Tamar Christina authored
gas/ * config/tc-aarch64.c (aarch64_reg_parse_32_64): Accept 4B. (aarch64_features): Added dotprod. * doc/c-aarch64.texi: Added dotprod. * testsuite/gas/aarch64/dotproduct.d: New. * testsuite/gas/aarch64/dotproduct.s: New. opcodes/ * aarch64-asm.c (aarch64_ins_reglane): Added 4B dotprod. * aarch64-dis.c (aarch64_ext_reglane): Likewise. * aarch64-tbl.h (QL_V3DOT, QL_V2DOT): New. (aarch64_feature_dotprod, DOT_INSN): New. (udot, sdot): New. * aarch64-dis-2.c: Regenerated. include/ * opcode/aarch64.h: (AARCH64_FEATURE_DOTPROD): New. (aarch64_insn_class): Added dotprod.
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Jiong Wang authored
This patch add assembler and disassembler support for new Dot Product Extension. The support can be enabled through the new "+dotprod" extension. include/ * opcode/arm.h (FPU_NEON_EXT_DOTPROD): New macro. (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): New macro. gas/ * config/tc-arm.c (fpu_neon_ext_dotprod): New variable. (neon_scalar_for_mul): Improve comments. (do_neon_dotproduct): New function to encode Dot Product instructions. (do_neon_dotproduct_s): Wrapper function for signed Dot Product instructions. (do_neon_dotproduct_u): Wrapper function for unsigned Dot Product instructions. (insns): New entries for vsdot and vudot. (arm_extensions): New entry for "dotprod". * doc/c-arm.texi: Document new "dotprod" extension. * testsuite/gas/arm/dotprod.s: New test source. * testsuite/gas/arm/dotprod-illegal.s: New test source. * testsuite/gas/arm/dotprod.d: New test. * testsuite/gas/arm/dotprod-thumb2.d: New test. * testsuite/gas/arm/dotprod-illegal.d: New test. * testsuite/gas/arm/dotprod-legacy-arch.d: New test. * testsuite/gas/arm/dotprod-illegal.l: New error file. * testsuite/gas/arm/dotprod-legacy-arch.l: New error file. opcodes/ * arm-dis.c (coprocessor_opcodes): New entries for vsdot and vudot.
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Doug Gilmore authored
Fix issue exposed by commit 3e29f34a. The basic issue is that section data referenced through an objfile pointer can also be referenced via the program-space data pointer, although via a separate mapping mechanism, which is set up by update_section_map. Thus once section data attached to an objfile pointer is released, the section map associated with the program-space data pointer must be marked dirty to ensure that update_section_map is called to prevent stale data being referenced. For the matter at hand this marking is being done via a call to objfiles_changed. Before commit 3e29f34a objfiles_changed could be called after all of the objfile pointers were processed in reread_symbols since section data references via the program-space data pointer would not occur in the calls of read_symbols performed by reread_symbols. With commit 3e29f34a MIPS target specific calls to find_pc_section were added to the code for DWARF information processing, which is called via read_symbols. Thus in reread_symbols the call to objfiles_changed needs to be called before calling read_symbols, otherwise stale section data can be referenced. Thanks to Luis Machado for providing text for the main comment associated with the change. gdb/ 2017-06-28 Doug Gilmore <Doug.Gilmore@imgtec.com> PR gdb/21337 * symfile.c (reread_symbols): Call objfiles_changed just before read_symbols. gdb/testsuite/ 2017-06-28 Doug Gilmore <Doug.Gilmore@imgtec.com> PR gdb/21337 * gdb.base/reread-readsym.exp: New file. * gdb.base/reread-readsym.c: New file.
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Maciej W. Rozycki authored
Add GAS tests to verify Imagination interAptiv MR2 instruction assembly, disassembly and ELF object file flags. Add LD tests to verify Imagination interAptiv MR2 ELF object file link-time compatibility and flag merging/propagation. Use the framework enhancement added with commit 7575e6a7 ("MIPS/LD/testsuite: mips-elf-flags: Add MIPS ABI Flags handling"). gas/ * testsuite/gas/mips/elf_mach_interaptiv-mr2.d: New test. * testsuite/gas/mips/save-err.d: New test. * testsuite/gas/mips/save-sub.d: New test. * testsuite/gas/mips/interaptiv-mr2@save.d: New test. * testsuite/gas/mips/mips1@save-sub.d: New test. * testsuite/gas/mips/mips2@save-sub.d: New test. * testsuite/gas/mips/mips3@save-sub.d: New test. * testsuite/gas/mips/mips4@save-sub.d: New test. * testsuite/gas/mips/mips5@save-sub.d: New test. * testsuite/gas/mips/mips32@save-sub.d: New test. * testsuite/gas/mips/mips64@save-sub.d: New test. * testsuite/gas/mips/mips16@save-sub.d: New test. * testsuite/gas/mips/mips16e@save-sub.d: New test. * testsuite/gas/mips/r3000@save-sub.d: New test. * testsuite/gas/mips/r3900@save-sub.d: New test. * testsuite/gas/mips/r4000@save-sub.d: New test. * testsuite/gas/mips/vr5400@save-sub.d: New test. * testsuite/gas/mips/interaptiv-mr2@save-sub.d: New test. * testsuite/gas/mips/sb1@save-sub.d: New test. * testsuite/gas/mips/octeon2@save-sub.d: New test. * testsuite/gas/mips/octeon3@save-sub.d: New test. * testsuite/gas/mips/xlr@save-sub.d: New test. * testsuite/gas/mips/r5900@save-sub.d: New test. * testsuite/gas/mips/mips16e2-copy.d: New test. * testsuite/gas/mips/mips16e2-copy-err.d: New test. * testsuite/gas/mips/save.d: Remove `MIPS16e' from the `name' option. Adjust for trailing padding change. * testsuite/gas/mips/mips16e2-copy-err.l: New stderr output. * testsuite/gas/mips/save-sub.s: New test source. * testsuite/gas/mips/mips16e2-copy.s: New test source. * testsuite/gas/mips/mips16e2-copy-err.s: New test source. * testsuite/gas/mips/save.s: Update description, change trailing padding and remove trailing white space. * testsuite/gas/mips/mips.exp: Expand `save' and `save-err' tests across the regular MIPS interAptiv MR2 architecture. Run the new tests. ld/ * testsuite/ld-mips-elf/mips-elf-flags.exp: Add interAptiv MR2 tests.
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Maciej W. Rozycki authored
Define a new regular MIPS and MIPS16 interAptiv MR2 test architecture and adjust existing tests now run against these architectures accordingly. This change causes new test failures: FAIL: MIPS jal-svr4pic (interaptiv-mr2) FAIL: MIPS jal-svr4pic noreorder (interaptiv-mr2) with the `mips-sgi-irix5' and `mips-sgi-irix6' targets, which are consistent with the remaining architecture results for these cases, that do not take into account the lack of R_MIPS_JALR relocations produced by GAS for these targets. As a preexisting issue these failures are not addressed with this change. gas/ * testsuite/gas/mips/mips.exp (interaptiv-mr2): New architecture. (mips16e2-interaptiv-mr2): Likewise. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro.d: New test. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-t.d: New test. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-e.d: New test. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.d: New test. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.d: New test. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64.d: New test. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-sub.d: New test. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-sub.d: New test. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-asmacro.d: New test. * testsuite/gas/mips/interaptiv-mr2@mcu.d: New test. * testsuite/gas/mips/interaptiv-mr2@isa-override-1.d: New test. * testsuite/gas/mips/interaptiv-mr2@isa-override-2.d: New test. * testsuite/gas/mips/attr-gnu-4-5.d: Ignore any number of ASE flag lines present rather than just one. * testsuite/gas/mips/attr-gnu-4-6.d: Likewise. * testsuite/gas/mips/attr-gnu-4-7.d: Likewise. * testsuite/gas/mips/attr-none-o32-fp64-nooddspreg.d: Likewise. * testsuite/gas/mips/attr-none-o32-fp64.d: Likewise. * testsuite/gas/mips/attr-none-o32-fpxx.d: Likewise. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro.l: New stderr output. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-t.l: New stderr output. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-e.l: New stderr output. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-sub.l: New stderr output. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-sub.l: New stderr output. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64-sub.l: New stderr output. * testsuite/gas/mips/interaptiv-mr2@isa-override-1.l: New stderr output. * testsuite/gas/mips/interaptiv-mr2@isa-override-2.l: New stderr output.
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Maciej W. Rozycki authored
Add support for the Imagination interAptiv MR2 MIPS32r3 processor with the MIPS16e2 ASE as per documentation, including in particular: 1. Support for implementation-specific interAptiv MR2 COPYW and UCOPYW MIPS16e2 instructions[1], for assembly and disassembly, 2. Support for implementation-specific interAptiv MR2 SAVE and RESTORE regular MIPS instructions[2], for assembly and disassembly, 3. ELF binary file annotation for the interAptiv MR2 MIPS architecture extension. 4. Support for interAptiv MR2 architecture selection for assembly, in the form of the `-march=interaptiv-mr2' command-line option and its corresponding `arch=interaptiv-mr2' setting for the `.set' and `.module' pseudo-ops. 5. Support for interAptiv MR2 architecture selection for disassembly, in the form of the `mips:interaptiv-mr2' target architecture, for use e.g. with the `-m' command-line option for `objdump'. Parts of this change by Matthew Fortune and Andrew Bennett. References: [1] "MIPS32 interAptiv Multiprocessing System Software User's Manual", Imagination Technologies Ltd., Document Number: MD00904, Revision 02.01, June 15, 2016, Section 24.3 "MIPS16e2 Implementation Specific Instructions", pp. 878-883 [2] same, Chapter 25 "Implementation-specific Instructions", pp. 911-917 include/ * elf/mips.h (E_MIPS_MACH_IAMR2): New macro. (AFL_EXT_INTERAPTIV_MR2): Likewise. * opcode/mips.h: Document new operand codes defined. (INSN_INTERAPTIV_MR2): New macro. (INSN_CHIP_MASK): Adjust accordingly. (CPU_INTERAPTIV_MR2): New macro. (cpu_is_member) <CPU_INTERAPTIV_MR2>: New case. (MIPS16_ALL_ARGS): Rename to... (MIPS_SVRS_ALL_ARGS): ... this. (MIPS16_ALL_STATICS): Rename to... (MIPS_SVRS_ALL_STATICS): ... this. bfd/ * archures.c (bfd_mach_mips_interaptiv_mr2): New macro. * cpu-mips.c (I_interaptiv_mr2): New enum value. (arch_info_struct): Add "mips:interaptiv-mr2" entry. * elfxx-mips.c (_bfd_elf_mips_mach) <E_MIPS_MACH_IAMR2>: New case. (mips_set_isa_flags) <bfd_mach_mips_interaptiv_mr2>: Likewise. (bfd_mips_isa_ext) <bfd_mach_mips_interaptiv_mr2>: Likewise. (print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise. (mips_mach_extensions): Add `bfd_mach_mipsisa32r3' and `bfd_mach_mips_interaptiv_mr2' entries. * bfd-in2.h: Regenerate. opcodes/ * mips-formats.h (INT_BIAS): New macro. (INT_ADJ): Redefine in INT_BIAS terms. * mips-dis.c (mips_arch_choices): Add "interaptiv-mr2" entry. (mips_print_save_restore): New function. (print_insn_arg) <OP_SAVE_RESTORE_LIST>: Update comment. (validate_insn_args) <OP_SAVE_RESTORE_LIST>: Remove `abort' call. (print_insn_args): Handle OP_SAVE_RESTORE_LIST. (print_mips16_insn_arg): Call `mips_print_save_restore' for OP_SAVE_RESTORE_LIST handling, factored out from here. * mips-opc.c (decode_mips_operand) <'-'> <'m'>: New case. (RD_31, RD_SP, WR_SP, MOD_SP, IAMR2): New macros. (mips_builtin_opcodes): Add "restore" and "save" entries. * mips16-opc.c (decode_mips16_operand) <'n', 'o'>: New cases. (IAMR2): New macro. (mips16_opcodes): Add "copyw" and "ucopyw" entries. binutils/ * readelf.c (get_machine_flags) <E_MIPS_MACH_IAMR2>: New case. (print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise. * NEWS: Mention Imagination interAptiv MR2 processor support. gas/ * config/tc-mips.c (validate_mips_insn): Handle OP_SAVE_RESTORE_LIST specially. (mips_encode_save_restore, mips16_encode_save_restore): New functions. (match_save_restore_list_operand): Factor out SAVE/RESTORE operand insertion into the instruction word or halfword to these new functions. (mips_cpu_info_table): Add "interaptiv-mr2" entry. * doc/c-mips.texi (MIPS Options): Add `interaptiv-mr2' to the `-march=' argument list. -
GDB Administrator authored
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- 27 Jun, 2017 1 commit
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Pedro Alves authored
Replace macros with functions. gdb/ChangeLog: 2017-06-27 Pedro Alves <palves@redhat.com> * symtab.c (COMPLETION_LIST_ADD_SYMBOL) (MCOMPLETION_LIST_ADD_SYMBOL): Delete macros, replace with ... (completion_list_add_symbol, completion_list_add_msymbol): ... these new functions. (add_symtab_completions) (default_make_symbol_completion_list_break_on_1): Adjust.
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