and though bugs are the bane of my existence, rest assured the wretched thing will get the best of care here

  1. 22 Jun, 2006 3 commits
    • nobody's avatar
      This commit was manufactured by cvs2svn to create tag 'binutils-csl- · aaf012ff
      nobody authored
      sourcerygxx-4_1-12'.
      
      Sprout from binutils-csl-2_17-branch 2006-06-22 15:44:18 UTC Richard Sandiford <rdsandiford@googlemail.com> 'binutils/'
      Delete:
          compile
          djunpack.bat
          gas/testsuite/gas/mips/vxworks1-el.d
          gas/testsuite/gas/mips/vxworks1-xgot-el.d
          gas/testsuite/gas/mips/vxworks1-xgot.d
          gas/testsuite/gas/mips/vxworks1.d
          gas/testsuite/gas/mips/vxworks1.s
          gas/testsuite/gas/sparc/vxworks-pic.d
          gas/testsuite/gas/sparc/vxworks-pic.s
          ld/elf-hints-local.h
          ld/emulparams/elf32_sparc_vxworks.sh
          ld/emulparams/elf32bfinfd.sh
          ld/emulparams/elf32ebmipvxworks.sh
          ld/emulparams/elf32elmipvxworks.sh
          ld/testsuite/ld-elf/eh1.s
          ld/testsuite/ld-elf/eh1a.s
          ld/testsuite/ld-elf/eh2a.s
          ld/testsuite/ld-elf/eh3.s
          ld/testsuite/ld-elf/eh3a.s
          ld/testsuite/ld-mips-elf/stub-dynsym-1-10000.d
          ld/testsuite/ld-mips-elf/stub-dynsym-1-2fe80.d
          ld/testsuite/ld-mips-elf/stub-dynsym-1-7fff.d
          ld/testsuite/ld-mips-elf/stub-dynsym-1-8000.d
          ld/testsuite/ld-mips-elf/stub-dynsym-1-fff0.d
          ld/testsuite/ld-mips-elf/stub-dynsym-1.ld
          ld/testsuite/ld-mips-elf/stub-dynsym-1.s
          ld/testsuite/ld-mips-elf/tls-hidden3.d
          ld/testsuite/ld-mips-elf/tls-hidden3.got
          ld/testsuite/ld-mips-elf/tls-hidden3.ld
          ld/testsuite/ld-mips-elf/tls-hidden3.r
          ld/testsuite/ld-mips-elf/tls-hidden3a.s
          ld/testsuite/ld-mips-elf/tls-hidden3b.s
          ld/testsuite/ld-mips-elf/tls-hidden4.got
          ld/testsuite/ld-mips-elf/tls-hidden4.r
          ld/testsuite/ld-mips-elf/tls-hidden4a.s
          ld/testsuite/ld-mips-elf/tls-hidden4b.s
          ld/testsuite/ld-mips-elf/vxworks1-lib.dd
          ld/testsuite/ld-mips-elf/vxworks1-lib.nd
          ld/testsuite/ld-mips-elf/vxworks1-lib.rd
          ld/testsuite/ld-mips-elf/vxworks1-lib.s
          ld/testsuite/ld-mips-elf/vxworks1-static.d
          ld/testsuite/ld-mips-elf/vxworks1.dd
          ld/testsuite/ld-mips-elf/vxworks1.ld
          ld/testsuite/ld-mips-elf/vxworks1.rd
          ld/testsuite/ld-mips-elf/vxworks1.s
          ld/testsuite/ld-mips-elf/vxworks2-static.sd
          ld/testsuite/ld-mips-elf/vxworks2.s
          ld/testsuite/ld-mips-elf/vxworks2.sd
          ld/testsuite/ld-sparc/vxworks1-lib.dd
          ld/testsuite/ld-sparc/vxworks1-lib.nd
          ld/testsuite/ld-sparc/vxworks1-lib.rd
          ld/testsuite/ld-sparc/vxworks1-lib.s
          ld/testsuite/ld-sparc/vxworks1-static.d
          ld/testsuite/ld-sparc/vxworks1.dd
          ld/testsuite/ld-sparc/vxworks1.ld
          ld/testsuite/ld-sparc/vxworks1.rd
          ld/testsuite/ld-sparc/vxworks1.s
          ld/testsuite/ld-sparc/vxworks2-static.sd
          ld/testsuite/ld-sparc/vxworks2.s
          ld/testsuite/ld-sparc/vxworks2.sd
      aaf012ff
    • Richard Sandiford's avatar
      binutils/ · 164af26a
      Richard Sandiford authored
      	* objcopy.c (localize_hidden): New variable.
      	(OPTION_LOCALIZE_HIDDEN): New command_line_switch value.
      	(copy_options): Add --localize-hidden.
      	(copy_usage): Mention --localize-hidden.
      	(is_hidden_symbol): New function.
      	(filter_symbols): Handle localize_hidden.
      	(copy_object): Call filter_symbols if localize_hidden.
      	(copy_main): Handle OPTION_LOCALIZE_HIDDEN.
      	* doc/binutils.texi (--localize-hidden): Document new option.
      
      binutils/testsuite/
      	* binutils-all/localize-hidden-1.s,
      	* binutils-all/localize-hidden-1.d,
      	* binutils-all/localize-hidden-2.s,
      	* binutils-all/localize-hidden-2.d: New tests.
      	* binutils-all/objcopy.exp: Run them.
      164af26a
    • Richard Sandiford's avatar
      Backport from mainline: · 68cfde24
      Richard Sandiford authored
      	binutils/testsuite/
      	2006-04-26  H.J. Lu  <hongjiu.lu@intel.com>
      
      	* lib/utils-lib.exp (run_dump_test): New.
      	(slurp_options): Likewise.
      	(regexp_diff): Likewise.
      	(file_contents): Likewise.
      	(verbose_eval): Likewise.
      68cfde24
  2. 21 Jun, 2006 1 commit
    • Mark Shinwell's avatar
      ld/ · eaf89de1
      Mark Shinwell authored
      	* ldlang.c (lang_insert_orphan): Correctly handle the case where
      	the section is to end up after the section currently at the end
      	of the list in output_bfd.
      eaf89de1
  3. 20 Jun, 2006 1 commit
    • Paul Brook's avatar
      2006-06-19 Vladimir Prus <vladimir@codesourcery.com> · e80e7921
      Paul Brook authored
      	bfd/
      	* elf32-arm.c (elf32_arm_swap_symbol_out): Don't set low
      	bit for undefined symbols.
      
      	ld/testsuite
      	* ld-arm/arm-elf.exp: New test.
      	* ld-arm/use-thumb-lib.s: New file.
      	* ld-arm/use-thumb-lib.sym: New file.
      e80e7921
  4. 19 Jun, 2006 1 commit
    • Paul Brook's avatar
      2006-06-19 Vladimir Prus <vladimir@codesourcery.com> · ff8424a6
      Paul Brook authored
      	bfd/
      	* elf32-arm.c (elf32_arm_swap_symbol_out): Don't set low
      	bit for undefined symbols.
      
      	ld/testsuite
      	* ld-arm/arm-elf.exp: New test.
      	* ld-arm/use-thumb-lib.s: New file.
      	* ld-arm/use-thumb-lib.sym: New file.
      ff8424a6
  5. 15 Jun, 2006 3 commits
    • Mark Shinwell's avatar
      Support for ARM "group relocations" numbers 4, and 57 through 83. · 12785f48
      Mark Shinwell authored
      	* include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}
      	to R_ARM_LDC_SB_G{0,1,2} respectively.
      
      	bfd/
      	* bfd-in2.h: Regenerate.
      	* elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0,
      	R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2,
      	R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0,
      	R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0,
      	R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC,
      	R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1,
      	R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1,
      	R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1,
      	R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1,
      	R_ARM_LDC_SB_G2): New relocation types.
      	(R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and
      	adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1
      	and friends.
      	(elf32_arm_howto_table_3): Delete; contents merged into
      	elf32_arm_howto_table_2.
      	(elf32_arm_howto_from_type): Adjust correspondingly.
      	(elf32_arm_reloc_map): Extend with the above relocations.
      	(calculate_group_reloc_mask): New function.
      	(identify_add_or_sub): New function.
      	(elf32_arm_final_link_relocate): Support for the above
      	relocations.
      	* reloc.c: Add enumeration entries for BFD_RELOC_ARM_...
      	codes to correspond to the above relocations.
      
      	gas/
      	* config/tc-arm.c (enum parse_operand_result): New.
      	(struct group_reloc_table_entry): New.
      	(enum group_reloc_type): New.
      	(group_reloc_table): New array.
      	(find_group_reloc_table_entry): New function.
      	(parse_shifter_operand_group_reloc): New function.
      	(parse_address_main): New function, incorporating code
      	from the old parse_address function.  To be used via...
      	(parse_address): wrapper for parse_address_main; and
      	(parse_address_group_reloc): new function, likewise.
      	(enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
      	OP_ADDRGLDRS, OP_ADDRGLDC.
      	(parse_operands): Support for these new operand codes.
      	New macro po_misc_or_fail_no_backtrack.
      	(encode_arm_cp_address): Preserve group relocations.
      	(insns): Modify to use the above operand codes where group
      	relocations are permitted.
      	(md_apply_fix): Handle the group relocations
      	ALU_PC_G0_NC through LDC_SB_G2.
      	(tc_gen_reloc): Likewise.
      	(arm_force_relocation): Leave group relocations for the linker.
      	(arm_fix_adjustable): Likewise.
      
      	gas/testsuite/
      	* gas/arm/group-reloc-alu.d: New test.
      	* gas/arm/group-reloc-alu-encoding-bad.d: New test.
      	* gas/arm/group-reloc-alu-encoding-bad.l: New test.
      	* gas/arm/group-reloc-alu-encoding-bad.s: New test.
      	* gas/arm/group-reloc-alu-parsing-bad.d: New test.
      	* gas/arm/group-reloc-alu-parsing-bad.l: New test.
      	* gas/arm/group-reloc-alu-parsing-bad.s: New test.
      	* gas/arm/group-reloc-alu.s: New test.
      	* gas/arm/group-reloc-ldc.d: New test.
      	* gas/arm/group-reloc-ldc-encoding-bad.d: New test.
      	* gas/arm/group-reloc-ldc-encoding-bad.l: New test.
      	* gas/arm/group-reloc-ldc-encoding-bad.s: New test.
      	* gas/arm/group-reloc-ldc-parsing-bad.d: New test.
      	* gas/arm/group-reloc-ldc-parsing-bad.l: New test.
      	* gas/arm/group-reloc-ldc-parsing-bad.s: New test.
      	* gas/arm/group-reloc-ldc.s: New test.
      	* gas/arm/group-reloc-ldr.d: New test.
      	* gas/arm/group-reloc-ldr-encoding-bad.d: New test.
      	* gas/arm/group-reloc-ldr-encoding-bad.l: New test.
      	* gas/arm/group-reloc-ldr-encoding-bad.s: New test.
      	* gas/arm/group-reloc-ldr-parsing-bad.d: New test.
      	* gas/arm/group-reloc-ldr-parsing-bad.l: New test.
      	* gas/arm/group-reloc-ldr-parsing-bad.s: New test.
      	* gas/arm/group-reloc-ldr.s: New test.
      	* gas/arm/group-reloc-ldrs.d: New test.
      	* gas/arm/group-reloc-ldrs-encoding-bad.d: New test.
      	* gas/arm/group-reloc-ldrs-encoding-bad.l: New test.
      	* gas/arm/group-reloc-ldrs-encoding-bad.s: New test.
      	* gas/arm/group-reloc-ldrs-parsing-bad.d: New test.
      	* gas/arm/group-reloc-ldrs-parsing-bad.l: New test.
      	* gas/arm/group-reloc-ldrs-parsing-bad.s: New test.
      	* gas/arm/group-reloc-ldrs.s: New test.
      
      	ld/testsuite/
      	* ld-arm/group-relocs-alu-bad.d: New test.
      	* ld-arm/group-relocs-alu-bad.s: New test.
      	* ld-arm/group-relocs.d: New test.
      	* ld-arm/group-relocs-ldc-bad.d: New test.
      	* ld-arm/group-relocs-ldc-bad.s: New test.
      	* ld-arm/group-relocs-ldr-bad.d: New test.
      	* ld-arm/group-relocs-ldr-bad.s: New test.
      	* ld-arm/group-relocs-ldrs-bad.d: New test.
      	* ld-arm/group-relocs-ldrs-bad.s: New test.
      	* ld-arm/group-relocs.s: New test.
      	* ld-arm/arm-elf.exp: Wire in new tests.
      12785f48
    • Julian Brown's avatar
      gas/ · 46fc5dd3
      Julian Brown authored
      	* config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
      	(do_neon_ldr_str): Always defer to VFP encoding routines, which handle
      	relocs properly.
      46fc5dd3
    • nobody's avatar
      This commit was manufactured by cvs2svn to create branch 'binutils-csl- · fb36a5ee
      nobody authored
      2_17-branch'.
      
      Cherrypick from master 2006-06-15 11:03:02 UTC Mark Shinwell <shinwell@codesourcery.com> '	* include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}':
          gas/testsuite/gas/arm/group-reloc-alu-encoding-bad.d
          gas/testsuite/gas/arm/group-reloc-alu-encoding-bad.l
          gas/testsuite/gas/arm/group-reloc-alu-encoding-bad.s
          gas/testsuite/gas/arm/group-reloc-alu-parsing-bad.d
          gas/testsuite/gas/arm/group-reloc-alu-parsing-bad.l
          gas/testsuite/gas/arm/group-reloc-alu-parsing-bad.s
          gas/testsuite/gas/arm/group-reloc-alu.d
          gas/testsuite/gas/arm/group-reloc-alu.s
          gas/testsuite/gas/arm/group-reloc-ldc-encoding-bad.d
          gas/testsuite/gas/arm/group-reloc-ldc-encoding-bad.l
          gas/testsuite/gas/arm/group-reloc-ldc-encoding-bad.s
          gas/testsuite/gas/arm/group-reloc-ldc-parsing-bad.d
          gas/testsuite/gas/arm/group-reloc-ldc-parsing-bad.l
          gas/testsuite/gas/arm/group-reloc-ldc-parsing-bad.s
          gas/testsuite/gas/arm/group-reloc-ldc.d
          gas/testsuite/gas/arm/group-reloc-ldc.s
          gas/testsuite/gas/arm/group-reloc-ldr-encoding-bad.d
          gas/testsuite/gas/arm/group-reloc-ldr-encoding-bad.l
          gas/testsuite/gas/arm/group-reloc-ldr-encoding-bad.s
          gas/testsuite/gas/arm/group-reloc-ldr-parsing-bad.d
          gas/testsuite/gas/arm/group-reloc-ldr-parsing-bad.l
          gas/testsuite/gas/arm/group-reloc-ldr-parsing-bad.s
          gas/testsuite/gas/arm/group-reloc-ldr.d
          gas/testsuite/gas/arm/group-reloc-ldr.s
          gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.d
          gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.l
          gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s
          gas/testsuite/gas/arm/group-reloc-ldrs-parsing-bad.d
          gas/testsuite/gas/arm/group-reloc-ldrs-parsing-bad.l
          gas/testsuite/gas/arm/group-reloc-ldrs-parsing-bad.s
          gas/testsuite/gas/arm/group-reloc-ldrs.d
          gas/testsuite/gas/arm/group-reloc-ldrs.s
          gas/testsuite/gas/mips/vxworks1-el.d
          gas/testsuite/gas/mips/vxworks1-xgot-el.d
          gas/testsuite/gas/mips/vxworks1-xgot.d
          gas/testsuite/gas/mips/vxworks1.d
          ld/emulparams/elf32bfinfd.sh
          ld/testsuite/ld-arm/group-relocs-alu-bad.d
          ld/testsuite/ld-arm/group-relocs-alu-bad.s
          ld/testsuite/ld-arm/group-relocs-ldc-bad.d
          ld/testsuite/ld-arm/group-relocs-ldc-bad.s
          ld/testsuite/ld-arm/group-relocs-ldr-bad.d
          ld/testsuite/ld-arm/group-relocs-ldr-bad.s
          ld/testsuite/ld-arm/group-relocs-ldrs-bad.d
          ld/testsuite/ld-arm/group-relocs-ldrs-bad.s
          ld/testsuite/ld-arm/group-relocs.d
          ld/testsuite/ld-arm/group-relocs.s
          ld/testsuite/ld-elf/eh1.s
          ld/testsuite/ld-elf/eh1a.s
          ld/testsuite/ld-elf/eh2a.s
          ld/testsuite/ld-elf/eh3.s
          ld/testsuite/ld-elf/eh3a.s
          ld/testsuite/ld-mips-elf/stub-dynsym-1-10000.d
          ld/testsuite/ld-mips-elf/stub-dynsym-1-2fe80.d
          ld/testsuite/ld-mips-elf/stub-dynsym-1-7fff.d
          ld/testsuite/ld-mips-elf/stub-dynsym-1-8000.d
          ld/testsuite/ld-mips-elf/stub-dynsym-1-fff0.d
          ld/testsuite/ld-mips-elf/stub-dynsym-1.ld
          ld/testsuite/ld-mips-elf/stub-dynsym-1.s
      fb36a5ee
  6. 25 May, 2006 2 commits
  7. 24 May, 2006 2 commits
    • Paul Brook's avatar
      2006-05-24 Paul Brook <paul@codesourcery.com> · d8071884
      Paul Brook authored
      	Backport from mainline.
      	* bfd/elf-bfd.h (elf_backend_data): Add
      	elf_backend_output_arch_local_syms
      	* bfd/elf32-arm.c (output_arch_syminfo): Define.
      	(elf32_arm_ouput_plt_map_sym, elf32_arm_output_plt_map,
      	elf32_arm_output_arch_local_syms): New functions.
      	(elf_backend_output_arch_local_syms): Define.
      	* bfd/elflink.c (bfd_elf_final_link): Call
      	elf_backend_output_arch_local_syms.
      	* bfd/elfxx-target.h (elf_backend_output_arch_local_syms): Provide
      	default definition.
      	(elfNN_bed): Add elf_backend_output_arch_local_syms.
      	* ld/testsuite/ld-arm/arm-app-abs32.d: Update expected output.
      	* ld/testsuite/ld-arm/arm-app.d: Ditto.
      	* ld/testsuite/ld-arm/arm-lib-plt32.d: Ditto.
      	* ld/testsuite/ld-arm/arm-lib.d: Ditto.
      	* ld/testsuite/ld-arm/mixed-app-v5.d: Ditto.
      	* ld/testsuite/ld-arm/mixed-app.d: Ditto.
      	* ld/testsuite/ld-arm/mixed-lib.d: Ditto.
      d8071884
    • Paul Brook's avatar
      2006-05-24 Paul Brook <paul@codesourcery.com> · 74d03616
      Paul Brook authored
      	Backport form mainline.
      	* bfd/elf32-arm.c (put_arm_insn, put_thumb_insn): New functions.
      	(elf32_thumb_to_arm_stub, elf32_arm_to_thumb_stub,
      	elf32_arm_finish_dynamic_symbol): Use them.
      74d03616
  8. 22 May, 2006 1 commit
  9. 20 May, 2006 1 commit
  10. 15 May, 2006 2 commits
    • Paul Brook's avatar
      2006-05-15 Paul Brook <paul@codesourcery.com> · 83276268
      Paul Brook authored
      	Backport from mainline.
      	* bfd/cpu-arm.c (bfd_is_arm_mapping_symbol_name): Rename ...
      	(bfd_is_arm_special_symbol_name): ... to this.  Add type argument.
      	Check symbol name is of specified type.
      	* bfd/elf32-arm.c (elf32_arm_is_target_special_symbol,
      	arm_elf_find_function, elf32_arm_output_symbol_hook): Use
      	bfd_is_arm_special_symbol_name.
      	* bfd/bfd-in.h (BFD_ARM_SPECIAL_SYM_TYPE_MAP,
      	BFD_ARM_SPECIAL_SYM_TYPE_TAG, BFD_ARM_SPECIAL_SYM_TYPE_OTHER,
      	BFD_ARM_SPECIAL_SYM_TYPE_ANY): Define.
      	(bfd_is_arm_mapping_symbol_name): Remove prototype.
      	(bfd_is_arm_special_symbol_name): Add prototype.
      	* bfd/bfd-in2.h: Regenerate.
      	* gas/config/tc-arm.c (arm_adjust_symtab): Use
      	bfd_is_arm_special_symbol_name.
      	* ld/testsuite/ld-arm/arm-be8.d: New test.
      	* ld/testsuite/ld-arm/arm-be8.s: New test.
      	* ld/testsuite/ld-arm/arm-elf.exp: Add arm-be8.
      83276268
    • nobody's avatar
      This commit was manufactured by cvs2svn to create branch 'binutils-csl- · a54c929d
      nobody authored
      2_17-branch'.
      
      Cherrypick from master 2006-05-15 19:57:35 UTC Paul Brook <paul@codesourcery.com> '2006-05-15  Paul Brook  <paul@codesourcery.com>':
          ld/testsuite/ld-arm/arm-be8.d
          ld/testsuite/ld-arm/arm-be8.s
      a54c929d
  11. 12 May, 2006 1 commit
    • Carlos O'Donell's avatar
      · a42549db
      Carlos O'Donell authored
      2006-05-12  Carlos O'Donell  <carlos@codesourcery.com>
      
      	* binutils/doc/binutils.texi: Rename "Index" to "Binutils Index"
      a42549db
  12. 11 May, 2006 1 commit
    • Carlos O'Donell's avatar
      · a4444fbb
      Carlos O'Donell authored
      2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>
      
      	* bfd/doc/bfd.texinfo: Rename "Index" to "BFD Index"
      	* ld/ld.texinfo: Rename "Index" to "LD Index"
      	* gas/doc/as.texinfo: Rename "Index" to "AS Index"
      	Rename "ABORT" to "ABORT (COFF)"
      a4444fbb
  13. 06 May, 2006 1 commit
    • Joseph Myers's avatar
      Backport: · e003008a
      Joseph Myers authored
      	2006-03-30  Jakub Jelinek  <jakub@redhat.com>
      	* ldmisc.c (vfinfo): Revert 2005-10-05 changes.  If
      	bfd_find_nearest_line succeeded for %C or %D, but filename
      	is NULL, print section+offset at the end.
      e003008a
  14. 05 May, 2006 2 commits
    • Julian Brown's avatar
      * gas/config/tc-arm.c (stdarg.h): include. · 4268c571
      Julian Brown authored
      	(arm_it): Add uncond_value field. Add isvec and issingle to operand
      	array.
      	(arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
      	REG_TYPE_NSDQ (single, double or quad vector reg).
      	(reg_expected_msgs): Update.
      	(BAD_FPU): Add macro for unsupported FPU instruction error.
      	(parse_neon_type): Support 'd' as an alias for .f64.
      	(parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
      	sets of registers.
      	(parse_vfp_reg_list): Don't update first arg on error.
      	(parse_neon_mov): Support extra syntax for VFP moves.
      	(operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
      	OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
      	(parse_operands): Support isvec, issingle operands fields, new parse
      	codes above.
      	(do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
      	msr variants.
      	(do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
      	(NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
      	(NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
      	(NEON_SHAPE_DEF): New macro. Define table of possible instruction
      	shapes.
      	(neon_shape): Redefine in terms of above.
      	(neon_shape_class): New enumeration, table of shape classes.
      	(neon_shape_el): New enumeration. One element of a shape.
      	(neon_shape_el_size): Register widths of above, where appropriate.
      	(neon_shape_info): New struct. Info for shape table.
      	(neon_shape_tab): New array.
      	(neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
      	(neon_check_shape): Rewrite as...
      	(neon_select_shape): New function to classify instruction shapes,
      	driven by new table neon_shape_tab array.
      	(neon_quad): New function. Return 1 if shape should set Q flag in
      	instructions (or equivalent), 0 otherwise.
      	(type_chk_of_el_type): Support F64.
      	(el_type_of_type_chk): Likewise.
      	(neon_check_type): Add support for VFP type checking (VFP data
      	elements fill their containing registers).
      	(do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
      	in thumb mode for VFP instructions.
      	(do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
      	and encode the current instruction as if it were that opcode.
      	(try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
      	arguments, call function in PFN.
      	(do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
      	(do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
      	(do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
      	(do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
      	(do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
      	Redirect Neon-syntax VFP instructions to VFP instruction handlers.
      	(do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
      	(do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
      	(neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
      	(do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
      	(do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
      	(do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
      	(do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
      	(do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
      	(do_neon_swp): Use neon_select_shape not neon_check_shape. Use
      	neon_quad.
      	(vfp_or_neon_is_neon): New function. Call if a mnemonic shared
      	between VFP and Neon turns out to belong to Neon. Perform
      	architecture check and fill in condition field if appropriate.
      	(do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
      	(do_neon_cvt): Add support for VFP variants of instructions.
      	(neon_cvt_flavour): Extend to cover VFP conversions.
      	(do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
      	vmov variants.
      	(do_neon_ldr_str): Handle single-precision VFP load/store.
      	(do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
      	NS_NULL not NS_IGNORE.
      	(opcode_tag): Add OT_csuffixF for operands which either take a
      	conditional suffix, or have 0xF in the condition field.
      	(md_assemble): Add support for OT_csuffixF.
      	(NCE): Replace macro with...
      	(NCE_tag, NCE, NCEF): New macros.
      	(nCE): Replace macro with...
      	(nCE_tag, nCE, nCEF): New macros.
      	(insns): Add support for VFP insns or VFP versions of insns msr, mrs,
      	vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop, vcvtz,
      	vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia, vldbdb, vstm,
      	vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared VFP/Neon insns
      	together.
      
      	* gas/testsuite/gas/arm/itblock.s: New file. Helper macro for making
      	all-true IT blocks.
      	* gas/testsuite/gas/arm/neon-cond-bad-inc.s: New test. Make sure
      	unconditional Neon instructions are rejected...
      	* gas/testsuite/gas/arm/neon-cond-bad.s: In ARM mode, and...
      	* gas/testsuite/gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode
      	(with IT).
      	* gas/testsuite/gas/arm/neon-cond-bad.l: Expected error output in ARM
      	mode.
      	* gas/testsuite/gas/arm/neon-cond-bad.d: Control ARM mode test.
      	* gas/testsuite/gas/arm/neon-cond-bad_t2.d: Expected output in Thumb
      	mode.
      	* gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style
      	syntax.
      	* gas/testsuite/gas/arm/vfp-neon-syntax.s: ...in ARM mode.
      	* gas/testsuite/gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
      	* gas/testsuite/gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
      	* gas/testsuite/gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb
      	mode.
      4268c571
    • Nathan Sidwell's avatar
      * configure: Regenerate. · 89fa0dc0
      Nathan Sidwell authored
      	* configure.in: Enable gprof for cross builds.
      89fa0dc0
  15. 03 May, 2006 2 commits
    • Julian Brown's avatar
    • Paul Brook's avatar
      2006-05-03 Paul Brook <paul@codesourcery.com> · bfe99150
      Paul Brook authored
      	* bfd/elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs.
      	(elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs.
      	(elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
      	* bfd/reloc.c: Ditto.
      	* bfd/bfd-in2.h: Regenerate.
      	* bfd/libbfd.h: Regenerate.
      	* bfd/libcoff.h: Regenerate.
      	* gas/config/tc-arm.c (parse_half): New function.
      	(operand_parse_code): Remove OP_Iffff.  Add OP_HALF.
      	(parse_operands): Ditto.
      	(do_mov16): Reject invalid relocations.
      	(do_t_mov16): Ditto.  Use Thumb reloc numbers.
      	(insns): Replace Iffff with HALF.
      	(md_apply_fix): Add MOVW and MOVT relocs.
      	(tc_gen_reloc): Ditto.
      	* gas/doc/c-arm.texi: Document relocation operators
      	* ld/testsuite/ld-arm/arm-elf.exp: Add arm-movwt.
      	* ld/testsuite/ld-arm/arm-movwt.d: New test.
      	* ld/testsuite/ld-arm/arm-movwt.s: New test.
      	* ld/testsuite/ld-arm/arm.ld: Add .far.
      bfe99150
  16. 02 May, 2006 1 commit
    • Joseph Myers's avatar
      * gas/config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset · 35b1b01f
      Joseph Myers authored
      	by 4 here.
      	(md_apply_fix3): Multiply offset by 4 here for
      	BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
      	* gas/testsuite/gas/arm/iwmmxt.s: Increase offsets for wstrb and
      	wstrh.
      	* gas/testsuite/gas/arm/iwmmxt.d: Update expected results.
      	* gas/testsuite/gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb
      	and wldrh.
      	* gas/testsuite/gas/arm/iwmmxt-bad2.l: Update expected error
      	messages.
      35b1b01f
  17. 01 May, 2006 1 commit
    • Paul Brook's avatar
      2006-05-01 Paul Brook <paul@codesourcery.com> · 8e41e2f8
      Paul Brook authored
      	* bfd/elf32-arm.c (elf32_arm_final_link_relocate): Set thumb funciton
      	bit for R_ARM_REL32.
      	* gas/config/tc-arm.c (arm_optimize_expr): New function.
      	* gas/config/tc-arm.h (md_optimize_expr): Define
      	(arm_optimize_expr): Add prototype.
      	(TC_FORCE_RELOCATION_SUB_SAME): Define.
      	* ld/testsuite/ld-arm/arm-elf.exp: Add thumb-rel32.
      	* ld/testsuite/ld-arm/thumb-rel32.d: New test.
      	* ld/testsuite/ld-arm/thumb-rel32.s: New test.
      8e41e2f8
  18. 29 Apr, 2006 2 commits
    • Paul Brook's avatar
      2006-04-29 Paul Brook <paul@codesourcery.com> · c67de0c0
      Paul Brook authored
      	* opcodes/arm-dis.c (coprocessor_opcodes): Add %c to unconditional
      	arm instructions.
      	(neon_opcodes): Add conditional execution specifiers.
      	(thumb_opcodes): Ditto.
      	(thumb32_opcodes): Ditto.
      	(arm_conditional): Change 0xe to "al" and add "" to end.
      	(ifthen_state, ifthen_next_state, ifthen_address): New.
      	(IFTHEN_COND): Define.
      	(print_insn_coprocessor, print_insn_neon): Print thumb conditions.
      	(print_insn_arm): Change %c to use new values of arm_conditional.
      	(print_insn_thumb16): Print thumb conditions.  Add %I.
      	(print_insn_thumb32): Print thumb conditions.
      	(find_ifthen_state): New function.
      	(print_insn): Track IT block state.
      	* gas/testsuite/gas/arm/thumb2_bcond.d: Update expected output.
      	* gas/testsuite/gas/arm/thumb32.d: Ditto.
      	* gas/testsuite/gas/arm/vfp1_t2.d: Ditto.
      	* gas/testsuite/gas/arm/vfp1xD_t2.d: Ditto.
      	* binutils/testsuite/binutils-all/arm/objdump.exp: New file.
      	* binutils/testsuite/binutils-all/arm/thumb2-cond.s: New test.
      c67de0c0
    • Mark Mitchell's avatar
      * doc/as.texinfo: Mention that some .type syntaxes are not · f79add9e
      Mark Mitchell authored
      	supported on all architectures.
      f79add9e
  19. 27 Apr, 2006 2 commits
    • Richard Sandiford's avatar
      include/opcodes/ · cd512e9c
      Richard Sandiford authored
      	* m68k.h (mcf_mask): Define.
      
      opcodes/
      	* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
      	and fmovem entries.  Put register list entries before immediate
      	mask entries.  Use "l" rather than "L" in the fmovem entries.
      	* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
      	out from INFO.
      	(m68k_scan_mask): New function, split out from...
      	(print_insn_m68k): ...here.  If no architecture has been set,
      	first try printing an m680x0 instruction, then try a Coldfire one.
      cd512e9c
    • Richard Sandiford's avatar
      bfd/ · b1f77134
      Richard Sandiford authored
      	* elf32-m68k.c (elf_m68k_pcrel_insn): New structure.
      	(elf_m68k_plt_info): Likewise.
      	(elf_m68k_plt_info): New table.
      	(CFV4E_PLT_ENTRY_SIZE): Rename to...
      	(ISAB_PLT_ENTRY_SIZE): ...this.
      	(CFV4E_FLAG): Delete.
      	(elf_cfv4e_plt0_entry): Rename to...
      	(elf_isab_plt0_entry): ...this.  Adjust comments.  Use (-6,%pc,%d0)
      	for the second instruction too.
      	(elf_cfv4e_plt_entry): Rename to...
      	(elf_isab_plt_entry): ...this.  Adjust comments and use (-6,%pc,%d0).
      	(elf_isab_plt_info): New table.
      	(CPU32_FLAG): Delete.
      	(PLT_CPU32_ENTRY_SIZE): Rename to...
      	(CPU32_PLT_ENTRY_SIZE): ...this.
      	(elf_cpu32_plt0_entry): Update bounds accordingly.
      	(elf_cpu32_plt_entry): Likewise.
      	(elf_cpu32_plt_info): New table.
      	(elf_m68k_link_hash_table): Add a plt_info field.
      	(elf_m68k_link_hash_table_create): Initialize it.
      	(elf_m68k_get_plt_info): New function.
      	(elf_m68k_always_size_sections): Likewise.
      	(elf_m68k_adjust_dynamic_symbol): Use the plt_info hash table field.
      	(elf_m68k_install_pcrel_field): New function.
      	(elf_m68k_finish_dynamic_symbol): Factor code using plt_info and
      	elf_m68k_install_pcrel_field.
      	(elf_m68k_finish_dynamic_sections): Likewise.
      	(elf_m68k_plt_sym_val): Use elf_m68k_get_plt_info.
      	(elf_backend_always_size_sections): Define.
      b1f77134
  20. 26 Apr, 2006 3 commits
    • Julian Brown's avatar
      * gas/config/tc-arm.c (parse_vfp_reg_list): Improve register bounds · f4c2ebbe
      Julian Brown authored
      	checking.
      	(do_neon_mov): Enable several VMOV variants for VFP. Add suitable
      	architecture version checks.
      	(insns): Allow overlapping instructions to be used in VFP mode.
      
         	* gas/testsuite/gas/arm/vfp-neon-overlap.s: New test. Overlapping
      	VFP/Neon instructions.
      	* gas/testsuite/gas/arm/vfp-neon-overlap.d: Expected output of above.
      	* gas/testsuite/gas/arm/vfp1xD.d: Test for fldmx/fstmx.
      	* gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
      	* gas/testsuite/gas/arm/vfpv3-32drs.d: Likewise.
      
         	* opcodes/arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx
      	as vldm/vstm.
      f4c2ebbe
    • Julian Brown's avatar
      * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to... · e0edc91a
      Julian Brown authored
      	(is_quarter_float): Rename from above. Simplify slightly.
      	(parse_qfloat_immediate): Parse a "quarter precision" floating-point
      	number.
      	(parse_neon_mov): Parse floating-point constants.
      	(neon_qfloat_bits): Fix encoding.
      	(neon_cmode_for_move_imm): Tweak to use floating-point encoding in
      	preference to integer encoding when using the F32 type.
      
         	* gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point
      	constants.
      	* gas/testsuite/gas/arm/neon-const.d: Expected output of above.
      	* gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly
      	for VMOV.F32.
      
         	* opcodes/arm-dis.c (print_insn_neon): Disassemble floating-point
      	constant VMOV.
      e0edc91a
    • nobody's avatar
      This commit was manufactured by cvs2svn to create branch 'binutils-csl- · 961c0e3b
      nobody authored
      2_17-branch'.
      
      Cherrypick from master 2006-04-26 16:02:40 UTC Julian Brown <julian@codesourcery.com> '	* gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point':
          gas/testsuite/gas/arm/neon-const.d
          gas/testsuite/gas/arm/neon-const.s
          gas/testsuite/gas/mips/vxworks1.s
          gas/testsuite/gas/sparc/vxworks-pic.d
          gas/testsuite/gas/sparc/vxworks-pic.s
          ld/elf-hints-local.h
          ld/emulparams/elf32_sparc_vxworks.sh
          ld/emulparams/elf32ebmipvxworks.sh
          ld/emulparams/elf32elmipvxworks.sh
          ld/testsuite/ld-mips-elf/tls-hidden3.d
          ld/testsuite/ld-mips-elf/tls-hidden3.got
          ld/testsuite/ld-mips-elf/tls-hidden3.ld
          ld/testsuite/ld-mips-elf/tls-hidden3.r
          ld/testsuite/ld-mips-elf/tls-hidden3a.s
          ld/testsuite/ld-mips-elf/tls-hidden3b.s
          ld/testsuite/ld-mips-elf/tls-hidden4.got
          ld/testsuite/ld-mips-elf/tls-hidden4.r
          ld/testsuite/ld-mips-elf/tls-hidden4a.s
          ld/testsuite/ld-mips-elf/tls-hidden4b.s
          ld/testsuite/ld-mips-elf/vxworks1-lib.dd
          ld/testsuite/ld-mips-elf/vxworks1-lib.nd
          ld/testsuite/ld-mips-elf/vxworks1-lib.rd
          ld/testsuite/ld-mips-elf/vxworks1-lib.s
          ld/testsuite/ld-mips-elf/vxworks1-static.d
          ld/testsuite/ld-mips-elf/vxworks1.dd
          ld/testsuite/ld-mips-elf/vxworks1.ld
          ld/testsuite/ld-mips-elf/vxworks1.rd
          ld/testsuite/ld-mips-elf/vxworks1.s
          ld/testsuite/ld-mips-elf/vxworks2-static.sd
          ld/testsuite/ld-mips-elf/vxworks2.s
          ld/testsuite/ld-mips-elf/vxworks2.sd
          ld/testsuite/ld-sparc/vxworks1-lib.dd
          ld/testsuite/ld-sparc/vxworks1-lib.nd
          ld/testsuite/ld-sparc/vxworks1-lib.rd
          ld/testsuite/ld-sparc/vxworks1-lib.s
          ld/testsuite/ld-sparc/vxworks1-static.d
          ld/testsuite/ld-sparc/vxworks1.dd
          ld/testsuite/ld-sparc/vxworks1.ld
          ld/testsuite/ld-sparc/vxworks1.rd
          ld/testsuite/ld-sparc/vxworks1.s
          ld/testsuite/ld-sparc/vxworks2-static.sd
          ld/testsuite/ld-sparc/vxworks2.s
          ld/testsuite/ld-sparc/vxworks2.sd
      961c0e3b
  21. 24 Apr, 2006 1 commit
  22. 12 Apr, 2006 2 commits
    • Carlos O'Donell's avatar
      · 9ac02f86
      Carlos O'Donell authored
      Correct ChangeLog.csl date typo.
      9ac02f86
    • Carlos O'Donell's avatar
      · 1297b50a
      Carlos O'Donell authored
      2006-04-12  Carlos O'Donell  <carlos@codesourcery.com>
      
      	* Makefile.tpl: Add install-html to install target deps.
      	* Makefile.in: Regenerate.
      1297b50a
  23. 07 Apr, 2006 1 commit
    • Julian Brown's avatar
      · 19b3f5ca
      Julian Brown authored
      	* gas/config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
      	zero-initialising structures containing it will lead to invalid
      	types).
      	(arm_it): Add vectype to each operand.
      	(NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
      	defined field.
      	(neon_typed_alias): New structure. Extra information for typed
      	register aliases.
      	(reg_entry): Add neon type info field.
      	(arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
      	Break out alternative syntax for coprocessor registers, etc. into...
      	(arm_reg_alt_syntax): New function. Alternate syntax handling broken
      	out from arm_reg_parse.
      	(parse_neon_type): Move. Return SUCCESS/FAIL.
      	(first_error): New function. Call to ensure first error which occurs
      	is reported.
      	(parse_neon_operand_type): Parse exactly one type.
      	(NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
      	(parse_typed_reg_or_scalar): New function. Handle core of both
      	arm_typed_reg_parse and parse_scalar.
      	(arm_typed_reg_parse): Parse a register with an optional type.
      	(NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
      	result.
      	(parse_scalar): Parse a Neon scalar with optional type.
      	(parse_reg_list): Use first_error.
      	(parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
      	(neon_alias_types_same): New function. Return true if two (alias) types
      	are the same.
      	(parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
      	of elements.
      	(insert_reg_alias): Return new reg_entry not void.
      	(insert_neon_reg_alias): New function. Insert type/index information as
      	well as register for alias.
      	(create_neon_reg_alias): New function. Parse .dn/.qn directives and
      	make typed register aliases accordingly.
      	(s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
      	of line.
      	(s_unreq): Delete type information if present.
      	(s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
      	(s_arm_unwind_save_mmxwcg): Likewise.
      	(s_arm_unwind_movsp): Likewise.
      	(s_arm_unwind_setfp): Likewise.
      	(parse_shift): Likewise.
      	(parse_shifter_operand): Likewise.
      	(parse_address): Likewise.
      	(parse_tb): Likewise.
      	(tc_arm_regname_to_dw2regnum): Likewise.
      	(md_pseudo_table): Add dn, qn.
      	(parse_neon_mov): Handle typed operands.
      	(parse_operands): Likewise.
      	(neon_type_mask): Add N_SIZ.
      	(N_ALLMODS): New macro.
      	(neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
      	(el_type_of_type_chk): Add some safeguards.
      	(modify_types_allowed): Fix logic bug.
      	(neon_check_type): Handle operands with types.
      	(neon_three_same): Remove redundant optional arg handling.
      	(do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
      	(do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
      	(do_neon_step): Adjust accordingly.
      	(neon_cmode_for_logic_imm): Use first_error.
      	(do_neon_bitfield): Call neon_check_type.
      	(neon_dyadic): Rename to...
      	(neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield to
      	allow modification of type of the destination.
      	(do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
      	(do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
      	(do_neon_compare): Make destination be an untyped bitfield.
      	(neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
      	(neon_mul_mac): Return early in case of errors.
      	(neon_move_immediate): Use first_error.
      	(neon_mac_reg_scalar_long): Fix type to include scalar.
      	(do_neon_dup): Likewise.
      	(do_neon_mov): Likewise (in several places).
      	(do_neon_tbl_tbx): Fix type.
      	(do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
      	(do_neon_ld_dup): Exit early in case of errors and/or use first_error.
      	(opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
      	Handle .dn/.qn directives.
      	(REGDEF): Add zero for reg_entry neon field.
      
      	* gas/testsuite/gas/arm/neon-psyn.s: Basic test of programmers syntax.
      	* gas/testsuite/gas/arm/neon-psyn.d: Expected output of above.
      19b3f5ca
  24. 03 Apr, 2006 2 commits
    • Carlos O'Donell's avatar
      · 24438eaa
      Carlos O'Donell authored
      2006-04-03  Carlos O'Donell <carlos@codesourcery.com>
      
      	* Makefile.tpl: Add install-html target.
      	* Makefile.def: Add install-html target.
      	* Makefile.in: Regenerate.
      	* configure.in: Add --with-datarootdir, --with-docdir,
      	and --with-htmldir options.
      	* configure: Regenerate.
      	* opcodes/Makefile.am: Add install-html target.
      	* opcodes/Makefile.in: Regenerate.
      	* libiberty/Makefile.in: Add install-html, install-html-am, and
      	install-html-recursive targets. Define mkdir_p and
      	NORMAL_INSTALL.
      	* libiberty/configure.ac: AC_SUBST datarootdir, docdir, htmldir.
      	* libiberty/configure: Regenerate.
      	* libiberty/testsuite/Makefile.in: Add install-html and html targets.
      	* ld/Makefile.am: Add install-html, install-html-am, and
      	install-html-recursive targets.
      	* ld/Makefile.in: Regenerate.
      	* ld/configure.in: AC_SUBST datarootdir, docdir, htmldir.
      	* ld/configure: Regenerate.
      	* ld/po/Make-in: Add install-html target.
      	* intl/Makefile.in: Add html info and dvi and install-html to .PHONY
      	Add install-html target.
      	* gprof/po/Make-in: Add install-html target.
      	* gprof/Makefile.am: Add install-html, install-html-am and
      	install-html-recursive targets.
      	* gprof/Makefile.in: Regenerate.
      	* gprof/configure.in: AC_SUBST datarootdir, docdir, htmldir.
      	* gprof/configure: Regenerate.
      	* gas/po/Make-in: Add install-html target.
      	* gas/Makefile.am: Add install-html and install-html-recursive targets.
      	* gas/Makefile.in: Regenerate.
      	* gas/configure.in: AC_SUBST datarootdir, docdir, htmldir.
      	* gas/configure: Regenerate.
      	* gas/doc/Makefile.am: Add install-html and install-html-am targets.
      	* gas/doc/Makefile.in: Regenerate.
      	* binutils/po/Make-in: Add install-html target.
      	* binutils/Makefile.am: Add install-html and install-html-recursive targets.
      	* binutils/Makefile.in: Regenerate.
      	* binutils/configure.in: AC_SUBST datarootdir, docdir and htmldir.
      	* binutils/configure: Regenerate.
      	* binutils/doc/Makefile.am: Add install-html and install-html-am targets.
      	* binutils/doc/Makefile.in: Regenerate.
      	* bfd/po/Make-in: Add install-html target.
      	* bfd/Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
      	htmldir. Add install-html and install-html-recursive targets.
      	* bfd/Makefile.in: Regenerate.
      	* bfd/configure.in: AC_SUBST for datarootdir, docdir and htmldir.
      	* bfd/configure: Regenerate.
      	* bfd/doc/Makefile.am: Add install-html and install-html-am targets.
      	Define datarootdir, docdir and htmldir.
      	* bfd/doc/Makefile.in: Regenerate.
      	* etc/Makefile.in: Add install-html target. Add htmldir,
      	docdir and datarootdir.
      	* etc/configure.texi: Document install-html target.
      	* etc/configure.in: AC_SUBST datarootdir, docdir, htmldir.
      	* etc/configure: Regenerate.
      24438eaa
    • Julian Brown's avatar
      * binutils/readelf.c (arm_attr_tag_VFP_arch): Add VFPv3. · a35fa7ac
      Julian Brown authored
      	* gas/config/tc-arm.c (limits.h): Include.
      	(fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
      	(fpu_vfp_v3_or_neon_ext): Declare constants.
      	(neon_el_type): New enumeration of types for Neon vector elements.
      	(neon_type_el): New struct. Define type and size of a vector element.
         	(NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
      	instruction.
      	(neon_type): Define struct. The type of an instruction.
      	(arm_it): Add 'vectype' for the current instruction.
      	(isscalar, immisalign, regisimm, isquad): New predicates for operands.
      	(vfp_sp_reg_pos): Rename to...
      	(vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
      	tags.
      	(arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
      	(Neon D or Q register).
      	(reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon
      	D register.
      	(GE_OPT_PREFIX_BIG): Define constant, for use in...
      	(my_get_expression): Allow above constant as argument to accept
      	64-bit constants with optional prefix.
      	(arm_reg_parse): Add extra argument to return the specific type of
      	register in when either a D or Q register (REG_TYPE_NDQ) is requested.
      	Can be NULL.
      	(parse_scalar): New function. Parse Neon scalar (vector reg and index).
      	(parse_reg_list): Update for new arm_reg_parse args.
      	(parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
      	(parse_neon_el_struct_list): New function. Parse element/structure
      	register lists for VLD<n>/VST<n> instructions.
      	(s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
      	(s_arm_unwind_save_mmxwr): Likewise.
      	(s_arm_unwind_save_mmxwcg): Likewise.
      	(s_arm_unwind_movsp): Likewise.
      	(s_arm_unwind_setfp): Likewise.
      	(parse_big_immediate): New function. Parse an immediate, which may
      	be 64 bits wide. Put results in inst.operands[i].
      	(parse_shift): Update for new arm_reg_parse args.
      	(parse_address): Likewise. Add parsing of alignment specifiers.
      	(parse_neon_mov): Parse the operands of a VMOV instruction.
      	(operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC,
      	OP_NRDLST, OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC,
      	OP_RNDQ_RNSC, OP_RND_RNSC, OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b,
      	OP_I0, OP_I16z, OP_I32z, OP_I64, OP_I64z, OP_oI32b, OP_oRND,
      	OP_oRNQ, OP_oRNDQ.
      	(parse_operands): Handle new codes above.
      	(encode_arm_vfp_sp_reg): Rename to...
      	(encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
      	selected VFP version only supports D0-D15.
      	(do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
      	(do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
      	(do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
      	(do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
      	encode_arm_vfp_reg name, and allow 32 D regs.
      	(do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn)
      	(do_vfp_dp_rd_rn_rm, do_vfp_rm_rd_rn): New functions to encode VFP
      	insns allowing 32 D regs.
      	(do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
      	(do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
      	constant-load and conversion insns introduced with VFPv3.
      	(neon_tab_entry): New struct.
      	(NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
      	those which are the targets of pseudo-instructions.
      	(neon_opc): Enumerate opcodes, use as indices into...
      	(neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
      	(NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
      	(NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
      	(NEON_ENC_DUP): Define meaningful helper macros to look up values in
      	neon_enc_tab.
      	(neon_shape): Enumerate shapes (permitted register widths, etc.) for
      	Neon instructions.
      	(neon_type_mask): New. Compact type representation for type
      	checking.
      	(N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
      	permitted type combinations.
      	(N_IGNORE_TYPE): New macro.
      	(neon_check_shape): New function. Check an instruction shape for
      	multiple alternatives. Return the specific shape for the current
      	instruction.
      	(neon_modify_type_size): New function. Modify a vector type and
      	size, depending on the bit mask in argument 1.
      	(neon_type_promote): New function. Convert a given "key" type (of an
      	operand) into the correct type for a different operand, based on a bit
      	mask.
      	(type_chk_of_el_type): New function. Convert a type and size into the
      	compact representation used for type checking.
      	(el_type_of_type_ckh): New function. Reverse of above (only when a
      	single bit is set in the bit mask).
      	(modify_types_allowed): New function. Alter a mask of allowed types
      	based on a bit mask of modifications.
      	(neon_check_type): New function. Check the type of the current
      	instruction against the variable argument list. The "key" type of the
      	instruction is returned.
      	(neon_dp_fixup): New function. Fill in and modify instruction bits for
      	a Neon data-processing instruction depending on whether we're in ARM
      	mode or Thumb-2 mode.
      	(neon_logbits): New function.
      	(neon_three_same, neon_two_same, do_neon_dyadic_i_su)
      	(do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
      	(do_neon_qshl_imm, neon_cmode_for_logic_imm)
      	(neon_bits_same_in_bytes, neon_squash_bits, neon_is_quarter_float)
      	(neon_qfloat_bits, neon_cmode_for_move_imm, neon_write_immbits)
      	(neon_invert_size, do_neon_logic, do_neon_bitfield, neon_dyadic)
      	(do_neon_dyadic_if_su, do_neon_dyadic_if_su_d, do_neon_dyadic_if_i)
      	(do_neon_dyadic_if_i_d, do_neon_addsub_if_i, neon_exchange_operands)
      	(neon_compare, do_neon_cmp, do_neon_cmp_inv, do_neon_ceq)
      	(neon_scalar_for_mul, neon_mul_mac, do_neon_mac_maybe_scalar)
      	(do_neon_tst, do_neon_mul, do_neon_qdmulh, do_neon_fcmp_absolute)
      	(do_neon_fcmp_absolute_inv, do_neon_step, do_neon_abs_neg)
      	(do_neon_sli, do_neon_sri, do_neon_qshlu_imm, do_neon_qmovn)
      	(do_neon_qmovun, do_neon_rshift_sat_narrow)
      	(do_neon_rshift_sat_narrow_u, do_neon_movn, do_neon_rshift_narrow)
      	(do_neon_shll, neon_cvt_flavour, do_neon_cvt, neon_move_immediate)
      	(do_neon_mvn, neon_mixed_length, do_neon_dyadic_long, do_neon_abal)
      	(neon_mac_reg_scalar_long, do_neon_mac_maybe_scalar_long)
      	(do_neon_dyadic_wide, do_neon_vmull, do_neon_ext, do_neon_rev)
      	(do_neon_dup, do_neon_mov, do_neon_rshift_round_imm, do_neon_movl)
      	(do_neon_trn, do_neon_zip_uzp, do_neon_sat_abs_neg)
      	(do_neon_pair_long, do_neon_recip_est, do_neon_cls, do_neon_clz)
      	(do_neon_cnt, do_neon_swp, do_neon_tbl_tbx, do_neon_ldm_stm)
      	(do_neon_ldr_str, do_neon_ld_st_interleave, neon_alignment_bit)
      	(do_neon_ld_st_lane, do_neon_ld_dup, do_neon_ldx_stx): New
      	functions. Neon bit encoding and encoding helpers.
      	(parse_neon_type): New function. Parse Neon type specifier.
      	(opcode_lookup): Allow parsing of Neon type specifiers.
      	(REGNUM2, REGSETH, REGSET2): New macros.
      	(reg_names): Add new VFPv3 and Neon registers.
      	(NUF, nUF, NCE, nCE): New macros for opcode table.
      	(insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
      	fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd,
      	fmscd, fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd,
      	fmdrr, fmrrd. Add Neon instructions vaba, vhadd, vrhadd, vhsub,
      	vqadd, vqsub, vrshl, vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn,
      	veor, vbsl, vbit, vbif, vabd, vmax, vmin, vcge, vcgt, vclt, vcle,
      	vceq, vpmax, vpmin, vmla, vmls, vpadd, vadd, vsub, vtst, vmul,
      	vqdmulh, vqrdmulh, vacge, vacgt, vaclt, vacle, vrecps, vrsqrts,
      	vabs, vneg, v{r}shr,  v{r}sra, vsli, vsri, vqshrn, vq{r}shr{u}n,
      	v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, vabdl, vaddl, vsubl,
      	vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, vqdmlal, vqdmlsl,
      	vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, vmovl, v{q}movn,
      	vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, vrsqrte, vcls,
      	vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, vstr,
      	vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], fto[us][lh][sd].
      	(tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
      	(arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
      	(arm_option_cpu_value): Add vfp3 and neon.
      	(aeabi_set_public_attributes): Support VFPv3 and NEON attributes.
      	Fix VFPv1 attribute.
      
      	* gas/testsuite/gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon
      	instruction.
      	* gas/testsuite/gas/arm/copro.d: Update accordingly.
      	* gas/testsuite/gas/arm/neon-cond.s: New test. Conditional Neon opcodes
      	in ARM mode.
      	* gas/testsuite/gas/arm/neon-cond.d: Expected results of above.
      	* gas/testsuite/gas/arm/neon-cov.s: New test. Coverage of Neon
      	instructions.
      	* gas/testsuite/gas/arm/neon-cov.d: Expected results of above.
      	* gas/testsuite/gas/arm/neon-ldst-es.s: New test. Element and structure
      	loads and stores.
      	* gas/testsuite/gas/arm/neon-ldst-es.d: Expected results of above.
      	* gas/testsuite/gas/arm/neon-ldst-rm.s: New test. Single and multiple
      	register loads and stores.
      	* gas/testsuite/gas/arm/neon-ldst-rm.d: Expected results of above.
      	* gas/testsuite/gas/arm/neon-omit.s: New test. Omission of optional
      	operands.
      	* gas/testsuite/gas/arm/neon-omit.d: Expected results of above.
      	* gas/testsuite/gas/arm/vfp1.d: Expect Neon syntax for some VFP
      	instructions.
      	* gas/testsuite/gas/arm/vfp1_t2.d: Likewise.
      	* gas/testsuite/gas/arm/vfp1xD.d: Likewise.
      	* gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
      	* gas/testsuite/gas/arm/vfp2.d: Likewise.
      	* gas/testsuite/gas/arm/vfp2_t2.d: Likewise.
      	* gas/testsuite/gas/arm/vfp3-32drs.s: New test. Extended D register
      	range for VFP instructions.
      	* gas/testsuite/gas/arm/vfp3-32drs.d: Expected results of above.
      	* gas/testsuite/gas/arm/vfp3-const-conv.s: New test. VFPv3
      	constant-load and conversion instructions.
      	* gas/testsuite/gas/arm/vfp3-const-conv.d: Expected results of above.
      
      	* include/opcode/arm.h (FPU_VFP_EXT_V3): Define constant.
      	(FPU_NEON_EXT_V1): Likewise.
      	(FPU_VFP_HARD): Update.
      	(FPU_VFP_V3): Define macro.
      	(FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
      
      	* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k,
      	convert %<code>[zy] into %[zy]<code>.  Expand meaning of
      	%<bitfield>['`?].
      	Add unified load/store instruction names.
      	(neon_opcode_table): New.
      	(arm_opcodes): Expand meaning of %<bitfield>['`?].
      	(arm_decode_bitfield): New.
      	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
      	Use arm_decode_bitfield and adjust numeric specifiers.
      	Adjust %z & %y.
      	(print_insn_neon): New.
      	(print_insn_arm): Adjust print_insn_coprocessor call. Call
      	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
      	(print_insn_thumb32): Likewise.
      a35fa7ac
  25. 01 Apr, 2006 1 commit