- 03 Aug, 2016 4 commits
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Tristan Gingold authored
bfd/ 2016-08-03 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.27 * configure: Regenerate. binutils/ 2016-08-03 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2016-08-03 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2016-08-03 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2016-08-03 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2016-08-03 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
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Tristan Gingold authored
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Alan Modra authored
PR ld/20428 * elf64-ppc.c (ppc_get_stub_entry): Don't segfault on NULL group.
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GDB Administrator authored
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- 02 Aug, 2016 1 commit
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GDB Administrator authored
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- 01 Aug, 2016 1 commit
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GDB Administrator authored
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- 31 Jul, 2016 1 commit
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GDB Administrator authored
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- 30 Jul, 2016 1 commit
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GDB Administrator authored
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- 29 Jul, 2016 1 commit
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GDB Administrator authored
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- 28 Jul, 2016 1 commit
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GDB Administrator authored
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- 27 Jul, 2016 2 commits
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Nick Clifton authored
PR ld/20401 bfd * coffgen.c (fini_reloc_cookie_rels): Check for the extistence of the coff_section_data before using it.
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GDB Administrator authored
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- 19 Jul, 2016 1 commit
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Roland McGrath authored
ld/ * emulparams/aarch64elf.sh (GENERATE_PIE_SCRIPT): Set to yes. * emulparams/aarch64elf32.sh: Likewise. (cherry picked from commit 3af09e8d)
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- 01 Jul, 2016 12 commits
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Nick Clifton authored
* testsuite/binutils-all/objcopy.exp (objcopy_test_without_global_symbol): Expect this test to fail on the AArch64 and ARM targets, since they preserve their mapping symbols.
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Tristan Gingold authored
bfd/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.26.90 * configure: Regenerate. binutils/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
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Tristan Gingold authored
bfd/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.27.51 * configure: Regenerate. binutils/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
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Tristan Gingold authored
binutils/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.27. gas/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.27. ld/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.27.
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Tristan Gingold authored
binutils/ * doc/binutils.texi (objdump): Fix mis-placement.
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Jan Beulich authored
Additionally warn about scaling factors other than 1 for the latter two, as those get ignored by the hardware.
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Jan Beulich authored
While address overrides are ignored in 64-bit mode (and hence shouldn't really result in an error, but upon v1 converting this to a warning I was told otherwise), trying to use 16-bit addressing is documented to result in #UD, and hence the assembler should reject the attempt. (The added test case at once also checks that bndc{l,n,u} won't accept 16-bit register operands.) -
Jan Beulich authored
... due to their last byte looking like a suffix, when after its stripping a matching instruction can be found. Since memory operand size specifiers in Intel mode get converted into suffix representation internally, we need to keep track of the actual mnemonic suffix which may have got trimmed off, and check its validity while looking for a matching template. I tripper over this quite some time again after support for AMD's SSE5 instructions got removed, as at that point some of the SSE5 mnemonics, other than expected, didn't fail to assemble. But the problem affects many more instructions, namely (almost) all MMX, SSE, and AVX ones as it looks. I don't think it makes sense to add a testcase covering all of them, nor do I think it makes sense to pick out some random examples for a new test case.
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Jan Beulich authored
... just like is already the case for 16- and 32-bit movzb: I can't see why omitting suffixes on this (and movs{b,w,l}) is not allowed, when it is allowed for all other instructions where the suffix is redundant with (one of) the operands. -
Jan Beulich authored
- with Cpu64 Disp16 makes no sense for memory operands - with CpuNo64 Disp32S makes no sense - non-64-bit lgdt doesn't allow 10-byte operands
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Jan Beulich authored
The dual purpose mnemonic (string move vs scalar double move) breaks the assumption that the isstring flag would be set on both the first and last entry in the current set of templates, which results in bogus or missing diagnostics for the string move variant of the mnemonic. Short of mostly rewriting i386_index_check() and its interaction with the rest of the code, simply shrink the template set to just string instructions when encountering the second memory operand, and run i386_index_check() a second time for the first memory operand after that reduction.
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GDB Administrator authored
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- 30 Jun, 2016 15 commits
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Maciej W. Rozycki authored
gas/ * config/tc-mips.c (get_append_method): Fix a comment typo.
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Andrew Burgess authored
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Yao Qi authored
This patch fixes the typo "uf" in the comment. I'll push it in as the change is obvious. 2016-06-30 Yao Qi <yao.qi@linaro.org> * arm-dis.c (print_insn): Fix typo in comment.
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Matthew Fortune authored
Fix an assertion failure like: test.s: Assembler messages: test.s:3: Internal error! Assertion failure in append_insn at .../gas/config/tc-mips.c:7523. Please report this bug. triggered by assembling MIPS16 code like: hello: addiu $4, $4, 4 jr $31 with the generation of a listing file enabled, e.g.: $ as -mips16 -O2 -aln=test.lst The cause of the problem is the lack of support for moving instructions across frags in MIPS16 jump swapping, which triggers more easily with listing enabled as in that case every instruction gets placed in its own frag. It would trigger even with listing disabled though if the instruction to swap a MIPS16 jump with was unfortunately enough placed as last in a frag that became full. This scenario is already handled correctly with branch swapping in regular MIPS and microMIPS code, so reuse it for MIPS16 code as well, and now that all MIPS16 handling has become the same as the regular MIPS and microMIPS cases remove MIPS16 special casing altogether. This effectively complements: commit 464ab0e5 Author: Maciej W. Rozycki <macro@linux-mips.org> Date: Mon Aug 6 20:33:00 2012 +0000 <https://sourceware.org/ml/binutils/2012-08/msg00043.html>, ("MIPS/GAS: Correct microMIPS branch swapping assertion") for the MIPS16 case. The assertion itself was introduced with: commit 1e915849 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Wed Mar 9 09:17:02 2005 +0000 <https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11]"), but its introduction merely noted our existing lack of support for MIPS16 jump swapping across frags. gas/ * config/tc-mips.c (append_insn) <APPEND_SWAP>: Do not special case MIPS16 handling. * testsuite/gas/mips/branch-swap-3.d: New test. * testsuite/gas/mips/branch-swap-4.d: New test. * testsuite/gas/mips/mips16@branch-swap-3.d: New test. * testsuite/gas/mips/mips16@branch-swap-4.d: New test. * testsuite/gas/mips/micromips@branch-swap-3.d: New test. * testsuite/gas/mips/micromips@branch-swap-4.d: New test. * testsuite/gas/mips/branch-swap-3.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
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Maciej W. Rozycki authored
Simplify non-MIPS16 branch swapping by copying the MIPS16 variant, which sets the new position for the current instruction first and reduces the calculation of the new position of the previous instruction. Also refer to previous instruction's frag and position via `delay' for consistency. Reintroduce an explanatory comment, updated, previously removed with: commit 1e915849 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Wed Mar 9 09:17:02 2005 +0000 <https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11]"). gas/ * config/tc-mips.c (append_insn): Simplify non-MIPS16 branch swapping sequence.
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Maciej W. Rozycki authored
Correct a regression from commit 85024cd8 ("Run write_object_file after errors") causing unsuccessful assembly, which may be due to any reason, such as supplying a valid source like this: .text .byte 0 .err to terminate with an assertion failure like: test.s: Assembler messages: test.s:3: Error: .err encountered ../as-new: BFD (GNU Binutils) 2.24.51.20140628 internal error, aborting at .../gas/write.c line 608 in size_seg ../as-new: Please report this bug. on targets whose default text section alignment is above 0, typically RISC machines. This is due to an attempt to set last text section's frag alignment to 0, requested from `subsegs_finish_section' where `frag_align_code (alignment, 0)' is called with `alignment' set to 0 rather than the section alignment if `had_errors' has returned true. The call to `subsegs_finish_section' is made from `subsegs_finish' from `write_object_file' at unsuccessful completion, which previously wasn't made. Always set last section's frag alignment from the section alignment then, forcing no section padding instead if completing unsuccessfully, so that in that case alignment padding is still suppressed from any listing generated, fixing assertion failures for these targets: alpha-linuxecoff -FAIL: all pr20312 arm-aout -FAIL: all pr20312 mips-freebsd -FAIL: all pr20312 mips-img-linux -FAIL: all pr20312 mips-linux -FAIL: all pr20312 mips-mti-linux -FAIL: all pr20312 mips-netbsd -FAIL: all pr20312 mips-sgi-irix5 -FAIL: all pr20312 mips-sgi-irix6 -FAIL: all pr20312 mips-vxworks -FAIL: all pr20312 mips64-freebsd -FAIL: all pr20312 mips64-img-linux -FAIL: all pr20312 mips64-linux -FAIL: all pr20312 mips64-mti-linux -FAIL: all pr20312 mips64-openbsd -FAIL: all pr20312 mips64el-freebsd -FAIL: all pr20312 mips64el-img-linux -FAIL: all pr20312 mips64el-linux -FAIL: all pr20312 mips64el-mti-linux -FAIL: all pr20312 mips64el-openbsd -FAIL: all pr20312 mipsel-freebsd -FAIL: all pr20312 mipsel-img-linux -FAIL: all pr20312 mipsel-linux -FAIL: all pr20312 mipsel-mti-linux -FAIL: all pr20312 mipsel-netbsd -FAIL: all pr20312 mipsel-vxworks -FAIL: all pr20312 mipsisa32-linux -FAIL: all pr20312 mipsisa32el-linux -FAIL: all pr20312 mipsisa64-linux -FAIL: all pr20312 mipsisa64el-linux -FAIL: all pr20312 sh-pe -FAIL: all pr20312 sparc-aout -FAIL: all pr20312 gas/ PR gas/20312 * write.c (subsegs_finish_section): Force no section padding to alignment on failed assembly, always set last frag's alignment from section. * testsuite/gas/all/pr20312.l: New list test. * testsuite/gas/all/pr20312.s: New test source. * testsuite/gas/all/gas.exp: Run the new test
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Pedro Alves authored
Commit 51f77c37 ("Add testing infrastruture bits for running with MI on a separate UI") broke MI testing with native-gdbserver: $ make check RUNTESTFLAGS="--target_board=native-gdbserver mi-var-child.exp" ... Running .../src/binutils-gdb/gdb/testsuite/gdb.mi/mi-var-child.exp ... can't unset "inferior_spawn_id": no such variable while executing "unset inferior_spawn_id" (procedure "close_gdbserver" line 20) invoked from within "close_gdbserver" ... When testing with gdbserver, gdb_exit is overridden with a special version that calls close_gdbserver, which clears inferior_spawn_id. The problem is that the commit mentioned above made gdb_exit/mi_gdb_exit clear inferior_spawn_id too, and clearing a non-existing variable is a tcl error. Since gdb_exit/mi_gdb_exit always clears inferior_spawn_id now, the fix is simply to stop clearing it in close_gdbserver. gdb/testsuite/ 2016-06-30 Pedro Alves <palves@redhat.com> * lib/gdbserver-support.exp (close_gdbserver, gdb_exit): Don't unset inferior_spawn_id.
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Pedro Alves authored
Runing the whole gdb testsuite with MI on a separate tty, with: make check RUNTESTFLAGS="FORCE_SEPARATE_MI_TTY=1" Doesn't actually work because commit 51f77c37 ("Add testing infrastruture bits for running with MI on a separate UI") included a last-minute rename typo, now fixed with this commit. gdb/testsuite/ChangeLog: 2016-06-30 Pedro Alves <palves@redhat.com> * lib/mi-support.exp (default_mi_gdb_start): Declare global FORCE_SEPARATE_MI_TTY, not SEPARATE_MI_TTY.
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Andrew Burgess authored
gas * config.in (TARGET_WITH_CPU): Undefine. * configure.ac: Add --with-cpu support, and define in config.h. * configure: Regenerate. * config/tc-arc.c: Use TARGET_WITH_CPU to select default CPU. * NEWS: Mention new configure option.
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Matthew Wahab authored
GAS fails to recognize march=armv8.2-a as a superset of march=armv8.1-a when assembling NEON instructions. The patch corrects this, making -march=armv8.2-a -mfpu=neon-fp-armv8 enable the NEON intructions introduced with ARMv8.1-A. include/ 2016-06-30 Matthew Wahab <matthew.wahab@arm.com> * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set of enabled FPU features. gas/ 2016-06-30 Matthew Wahab <matthew.wahab@arm.com> * testsuite/gas/arm/armv8_2+rdma.d: New.
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Jim Wilson authored
* cpustate.h: Include config.h. (union GRegisterValue): Add WORDS_BIGENDIAN check. For big endian code use anonymous structs to align members. * simulator.c (aarch64_step): Use sim_core_read_buffer and endian_le2h_4 to read instruction from pc.
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Cary Coutant authored
With GCC 6 when not using -static-libstdc++, the operator delete(void*) function is defined in the shared C++ support library, rather than in the main program. The test script is too aggressive in checking for this symbol's presence among the exported symbols. This patch removes the check for that symbol. gold/ PR gold/20310 * testsuite/dynamic_list.sh: Remove check for _ZdlPv.
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Cary Coutant authored
gold/ * testsuite/Makefile.am (MOSTLYCLEANFILES): Add eh_test_2. * testsuite/Makefile.in: Regenerate.
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Alan Modra authored
* testsuite/Makefile.am (memory_test, memory_test_2): Pass -Wl,-z to gcc, not plain -z. * testsuite/Makefile.in: Regenerate.
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GDB Administrator authored
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