and though bugs are the bane of my existence, rest assured the wretched thing will get the best of care here

  1. 23 Feb, 2018 4 commits
  2. 22 Feb, 2018 16 commits
  3. 21 Feb, 2018 7 commits
    • Simon Atanasyan's avatar
      [docs][mips] Add MIPS specific release notes for LLD 6.0 · 93feb90b
      Simon Atanasyan authored
      Differential Revision: https://reviews.llvm.org/D43575
      
      llvm-svn: 325721
      93feb90b
    • Craig Topper's avatar
      [ReleaseNotes] Initial release notes for X86 target. · dd6e36c5
      Craig Topper authored
      llvm-svn: 325709
      dd6e36c5
    • Hans Wennborg's avatar
      Merging r325679: · f5b07235
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r325679 | hans | 2018-02-21 14:54:26 +0100 (Wed, 21 Feb 2018) | 9 lines
      
      [ELF] Add -nopie alias for -no-pie (PR36423)
      
      In r324043, --nopie was renamed to --no-pie to presumably fix a typo.
      
      As it turns out, "nopie" wasn't a typo but the spelling used by
      OpenBSD's binutils ld. Gold on the other hand spells the flag "no-pie".
      (Vanilla binutils doesn't have a flag like this at all.)
      
      Since they do the same thing, let's support both spellings.
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325680
      f5b07235
    • Hans Wennborg's avatar
      Merging r325655: · 379a6f88
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r325655 | ctopper | 2018-02-21 01:16:50 +0100 (Wed, 21 Feb 2018) | 8 lines
      
      [X86] Disable CLWB in Cannon Lake
      
      Cannon Lake does not support CLWB, therefore it
      does not include all features listed under SKX.
      
      Patch by Gabor Buella
      
      Differential Revision: https://reviews.llvm.org/D43459
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325672
      379a6f88
    • Hans Wennborg's avatar
      Merging r325654: · 0bb5f10a
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r325654 | ctopper | 2018-02-21 01:15:48 +0100 (Wed, 21 Feb 2018) | 10 lines
      
      [X86] Disable CLWB for Cannon Lake
      
      Cannon Lake does not support CLWB, therefore it
      does not include all features listed under SKX anymore.
      
      Instead, enumerate all SKX features with the exception of CLWB.
      
      Patch by Gabor Buella
      
      Differential Revision: https://reviews.llvm.org/D43380
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325671
      0bb5f10a
    • Hans Wennborg's avatar
      ReleaseNotes: mention NetBSD support for sanitizers · 03a71737
      Hans Wennborg authored
      By Kamil Rytarowski!
      
      llvm-svn: 325670
      03a71737
    • Hans Wennborg's avatar
      [AArch64][GlobalISel] Support G_INSERT/G_EXTRACT of types < s32 bits. · 59108aca
      Hans Wennborg authored
      These are needed for operations on fp16 types in a later patch.
      
      This also re-instates the test/CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir
      test that was deleted which depended on this patch.
      
      (See PR36345.)
      
      llvm-svn: 325669
      59108aca
  4. 20 Feb, 2018 7 commits
    • Hans Wennborg's avatar
      Merging r325525: · 0c14c942
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r325525 | steven_wu | 2018-02-19 20:22:28 +0100 (Mon, 19 Feb 2018) | 13 lines
      
      bitcode support change for fast flags compatibility
      
      Summary: The discussion and as per need, each vendor needs a way to keep the old fast flags and the new fast flags in the auto upgrade path of the IR upgrader.  This revision addresses that issue.
      
      Patched by Michael Berg
      
      Reviewers: qcolombet, hans, steven_wu
      
      Reviewed By: qcolombet, steven_wu
      
      Subscribers: dexonsmith, vsk, mehdi_amini, andrewrk, MatzeB, wristow, spatel
      
      Differential Revision: https://reviews.llvm.org/D43253
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325592
      0c14c942
    • Hans Wennborg's avatar
      Merging r325550: · 5bd09dd5
      Hans Wennborg authored
      I couldn't get fp16-copy-gpr.mir to pass after merging so I removed it until
      aemerson; the other test I re-generated and it seems to work.
      
      ------------------------------------------------------------------------
      r325550 | aemerson | 2018-02-20 06:11:57 +0100 (Tue, 20 Feb 2018) | 7 lines
      
      [AArch64][GlobalISel] When copying from a gpr32 to an fpr16 reg, convert to fpr32 first.
      
      This is a follow on commit to r[x] where we fix the other direction of copy.
      For this case, after converting the source from gpr32 -> fpr32, we use a
      subregister copy, which is essentially what EXTRACT_SUBREG does in SDAG land.
      
      https://reviews.llvm.org/D43444
      ------------------------------------------------------------------------
      
      llvm-svn: 325591
      5bd09dd5
    • Hans Wennborg's avatar
      Merging r325463: · 855905c2
      Hans Wennborg authored
      (I had to re-generate the test and manually update to handle the r323922 MIR physical register sigil.
      
      ------------------------------------------------------------------------
      r325463 | aemerson | 2018-02-18 18:10:49 +0100 (Sun, 18 Feb 2018) | 8 lines
      
      [AArch64][GlobalISel] Fix an assert fail/miscompile when fp16 types are copied
      to gpr register banks.
      
      PR36345.
      
      rdar://36478867
      
      Differential Revision: https://reviews.llvm.org/D43310
      ------------------------------------------------------------------------
      
      llvm-svn: 325586
      855905c2
    • Hans Wennborg's avatar
      Merging r324110: · 69b3f16a
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r324110 | aemerson | 2018-02-02 19:03:30 +0100 (Fri, 02 Feb 2018) | 3 lines
      
      [AArch64][GlobalISel] Use getRegClassForTypeOnBank() in selectCopy.
      
      Differential Revision: https://reviews.llvm.org/D42832
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325584
      69b3f16a
    • Hans Wennborg's avatar
      Merging r325576: · 5f967a72
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r325576 | hans | 2018-02-20 13:43:02 +0100 (Tue, 20 Feb 2018) | 13 lines
      
      Revert r325375 "[MS] Make constexpr static data members implicitly inline"
      
      This broke Clang bootstrap on Windows, PR36453.
      
      > This handles them exactly the same way that we handle const integral
      > static data members with inline definitions, which is what MSVC does.
      >
      > As a follow-up, now that we have a way to mark variables inline in the
      > AST, we should consider marking them implicitly inline there instead of
      > only treating them as inline in CodeGen. Unfortunately, this breaks a
      > lot of dllimport test cases, so that is future work for now.
      >
      > Fixes PR36125.
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325577
      5f967a72
    • Hans Wennborg's avatar
      Merging r325511: · 337d926f
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r325511 | labath | 2018-02-19 16:42:48 +0100 (Mon, 19 Feb 2018) | 14 lines
      
      Fix TestStopReplyContainsThreadPcs on 32-bit x86 (pr36013)
      
      Summary:
      The issue was that we were parsing the registers into 64-bit integers
      and the calling swapByteOrder without regard for the actual size of the
      register. This switches the test to use the RegisterValue class which
      tracks the register size, and knows how to initialize itself from a
      piece of memory (so we don't need to swap byte order ourselves).
      
      Reviewers: eugene, davide
      
      Subscribers: lldb-commits
      
      Differential Revision: https://reviews.llvm.org/D43376
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325563
      337d926f
    • Hans Wennborg's avatar
      Merging r324722: · d8bd1539
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r324722 | labath | 2018-02-09 10:40:03 +0100 (Fri, 09 Feb 2018) | 17 lines
      
      llgs-test: Parse and store register info recieved from lldb-server
      
      Summary:
      Right now the test client is not parsing register values correctly,
      which is manifesting itself in one test failing on 32-bit architectures
      (pr36013). This parses the information from the qRegisterInfo packets
      and stores it in the client, which will enable fixing the parsing in a
      follow up commit.
      
      I am also adding a new templated SendMessage overload, which enables one
      to send a message get a parsed response in a single call.
      
      Reviewers: eugene, davide
      
      Subscribers: lldb-commits
      
      Differential Revision: https://reviews.llvm.org/D43076
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325562
      d8bd1539
  5. 19 Feb, 2018 6 commits
    • Hans Wennborg's avatar
      Merging r324195: · 68344bec
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r324195 | mcrosier | 2018-02-04 16:42:24 +0100 (Sun, 04 Feb 2018) | 12 lines
      
      [LV] Use Demanded Bits and ValueTracking for reduction type-shrinking
      
      The type-shrinking logic in reduction detection, although narrow in scope, is
      also rather ad-hoc, which has led to bugs (e.g., PR35734). This patch modifies
      the approach to rely on the demanded bits and value tracking analyses, if
      available. We currently perform type-shrinking separately for reductions and
      other instructions in the loop. Long-term, we should probably think about
      computing minimal bit widths in a more complete way for the loops we want to
      vectorize.
      
      PR35734
      Differential Revision: https://reviews.llvm.org/D42309
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325508
      68344bec
    • Hans Wennborg's avatar
      Merging r324916: · 64058482
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r324916 | junbuml | 2018-02-12 18:56:55 +0100 (Mon, 12 Feb 2018) | 7 lines
      
      [LICM] update BlockColors after splitting predecessors
      
      Update BlockColors after splitting predecessors. Do not allow splitting
      EHPad for sinking when the BlockColors is not empty, so we can
      simply assign predecessor's color to the new block.
      
      Fixes PR36184
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325507
      64058482
    • Hans Wennborg's avatar
      Merging r325204: · 1092e490
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r325204 | ruiu | 2018-02-15 03:40:58 +0100 (Thu, 15 Feb 2018) | 7 lines
      
      Fix an issue that lld drops symbol versions for -r.
      
      When we are emitting a relocatable output, we should keep the original
      symbol name including "@" part. Previously, we drop that part unconditionally
      which resulted in dropping versions from symbols.
      
      Differential Revision: https://reviews.llvm.org/D43307
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325502
      1092e490
    • Hans Wennborg's avatar
      Merging r325148: · a641957c
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r325148 | ctopper | 2018-02-14 19:08:33 +0100 (Wed, 14 Feb 2018) | 7 lines
      
      [InstCombine] Don't fold select(C, Z, binop(select(C, X, Y), W)) -> select(C, Z, binop(Y, W)) if the binop is rem or div.
      
      The select may have been preventing a division by zero or INT_MIN/-1 so removing it might not be safe.
      
      Fixes PR36362.
      
      Differential Revision: https://reviews.llvm.org/D43276
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325501
      a641957c
    • Hans Wennborg's avatar
      Merging r325375: · 4c336031
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r325375 | rnk | 2018-02-16 20:44:47 +0100 (Fri, 16 Feb 2018) | 11 lines
      
      [MS] Make constexpr static data members implicitly inline
      
      This handles them exactly the same way that we handle const integral
      static data members with inline definitions, which is what MSVC does.
      
      As a follow-up, now that we have a way to mark variables inline in the
      AST, we should consider marking them implicitly inline there instead of
      only treating them as inline in CodeGen. Unfortunately, this breaks a
      lot of dllimport test cases, so that is future work for now.
      
      Fixes PR36125.
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325500
      4c336031
    • Hans Wennborg's avatar
      Merging r325168: · 2dc96ae2
      Hans Wennborg authored
      ```---------------------------------------------------------------------
      r325168 | rksimon | 2018-02-14 21:43:47 +0100 (Wed, 14 Feb 2018) | 1 line
      
      Removed superfluous semicolon to fix -Wpedantic gcc warning. NFCI.
      ```
      
      ---------------------------------------------------------------------
      
      llvm-svn: 325498
      2dc96ae2