- 06 Dec, 2016 3 commits
-
-
Tom Stellard authored
```--------------------------------------------------------------------- r288433 | oranevskyy | 2016-12-01 14:58:35 -0800 (Thu, 01 Dec 2016) | 24 lines [ARM] Fix for 64-bit CAS expansion on ARM32 with -O0 Summary: This patch fixes comparison of 64-bit atomic with its expected value in CMP_SWAP_64 expansion. Currently, the low words are compared with CMP, while the high words are compared with SBC. SBC expects the carry flag to be set if CMP detects a difference. CMP might leave the carry unset for unequal arguments though if the first one is >= than the second. This might cause the comparison logic to detect false equality. Example of the broken C++ code: ``` std::atomic<long long> at(2); long long ll = 1; std::atomic_compare_exchange_strong(&at, &ll, 3); ``` Even though the atomic `at` and the expected value `ll` are not equal and `atomic_compare_exchange_strong` returns `false`, `at` is changed to 3. The patch replaces SBC with CMPEQ. Reviewers: t.p.northover Subscribers: aemerson, rengolin, llvm-commits, asl Differential Revision: https://reviews.llvm.org/D27315 ``` --------------------------------------------------------------------- llvm-svn: 288847
-
Tom Stellard authored
```--------------------------------------------------------------------- r288418 | tnorthover | 2016-12-01 13:31:59 -0800 (Thu, 01 Dec 2016) | 13 lines AArch64: fix 128-bit cmpxchg at -O0 (again, again). This time the issue is fortunately just a simple mistake rather than a horrible design spectre. I thought SUBS/SBCS provided sufficient NZCV flags for comparing two 64-bit values, but they don't. The fix is slightly clunkier in AArch64 because we can't use conditional execution to emit a pair of CMPs. Traditionally an "icmp ne i128" would map to an EOR/EOR/ORR/CBNZ, but that uses more registers so it's easier to go with a CSET/CINC/CBNZ combination. Slightly less efficient, but this is -O0 anyway. Thanks to Anton Korobeynikov for pointing out the issue. ``` --------------------------------------------------------------------- llvm-svn: 288846
-
Tom Stellard authored
```--------------------------------------------------------------------- r277755 | tnorthover | 2016-08-04 12:32:28 -0700 (Thu, 04 Aug 2016) | 5 lines AArch64: don't assume all i128s are BUILD_PAIRs It leads to a crash when they're not. I'm *sure* I've made this mistake before, at least once. ``` --------------------------------------------------------------------- llvm-svn: 288845
-
- 02 Dec, 2016 4 commits
-
-
Renato Golin authored
Fixes a bug encountered in RC2 validation. llvm-svn: 288513
-
Tom Stellard authored
This reverts commit r288454. This was committed accidently. llvm-svn: 288456
-
Tom Stellard authored
```--------------------------------------------------------------------- r287360 | hans | 2016-11-18 10:27:31 -0800 (Fri, 18 Nov 2016) | 2 lines Fix test from r287353: don't use /dev/null ``` --------------------------------------------------------------------- llvm-svn: 288455
-
Tom Stellard authored
```--------------------------------------------------------------------- r278268 | nhaehnle | 2016-08-10 11:51:14 -0700 (Wed, 10 Aug 2016) | 28 lines LiveIntervalAnalysis: fix a crash in repairOldRegInRange Summary: See the new test case for one that was (non-deterministically) crashing on trunk and deterministically hit the assertion that I added in D23302. Basically, the machine function contains a sequence DS_WRITE_B32 %vreg4, %vreg14:sub0, ... DS_WRITE_B32 %vreg4, %vreg14:sub0, ... %vreg14:sub1<def> = COPY %vreg14:sub0 and SILoadStoreOptimizer::mergeWrite2Pair merges the two DS_WRITE_B32 instructions into one before calling repairIntervalsInRange. Now repairIntervalsInRange wants to repair %vreg14, in particular, and ends up trying to repair %vreg14:sub1 as well, but that only becomes active _after_ the range that is to be repaired, hence the crash due to LR.find(...) == LR.begin() at the start of repairOldRegInRange. I believe that just skipping those subrange is fine, but again, not too familiar with that code. Reviewers: MatzeB, kparzysz, tstellarAMD Subscribers: llvm-commits, MatzeB Differential Revision: https://reviews.llvm.org/D23303 ``` --------------------------------------------------------------------- llvm-svn: 288454
-
- 29 Nov, 2016 7 commits
-
-
Tom Stellard authored
```--------------------------------------------------------------------- r280120 | niels_ole | 2016-08-30 11:00:22 -0700 (Tue, 30 Aug 2016) | 4 lines Basic/Targets.cpp: Add polaris10 and polaris11 gpus Differential Revision: https://reviews.llvm.org/D23746 ``` --------------------------------------------------------------------- llvm-svn: 288149
-
Tom Stellard authored
```--------------------------------------------------------------------- r284620 | simon.dardis | 2016-10-19 10:50:52 -0700 (Wed, 19 Oct 2016) | 14 lines [mips][msa] Range check MSA intrinsics with immediates This patch teaches clang to range check immediates for MIPS MSA instrinsics. This checking is done strictly in comparison to some existing GCC implementations. E.g. msa_andvi_b(var, 257) does not result in andvi $wX, 1. Similarily msa_ldi_b takes a range of -128 to 127. As part of this effort, correct the existing MSA test as it has both illegal types and immediates. Reviewers: vkalintiris Differential Revision: https://reviews.llvm.org/D25017 ``` --------------------------------------------------------------------- llvm-svn: 288109
-
Tom Stellard authored
```--------------------------------------------------------------------- r281975 | simon.dardis | 2016-09-20 08:07:36 -0700 (Tue, 20 Sep 2016) | 9 lines [mips] MSA intrinsics header file This patch adds the msa.h header file containing the shorter names for the MSA instrinsics, e.g. msa_sll_b for builtin_msa_sll_b. Reviewers: vkalintiris, zoran.jovanovic Differential Review: https://reviews.llvm.org/D24674 ``` --------------------------------------------------------------------- llvm-svn: 288108
-
Tom Stellard authored
```--------------------------------------------------------------------- r287339 | nhaehnle | 2016-11-18 03:55:52 -0800 (Fri, 18 Nov 2016) | 20 lines AMDGPU: Fix legalization of MUBUF instructions in shaders Summary: The addr64-based legalization is incorrect for MUBUF instructions with idxen set as well as for BUFFER_LOAD/STORE_FORMAT_* instructions. This affects e.g. shaders that access buffer textures. Since we never actually need the addr64-legalization in shaders, this patch takes the easy route and keys off the calling convention. If this ever affects (non-OpenGL) compute, the type of legalization needs to be chosen based on some TSFlag. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98664 Reviewers: arsenm, tstellarAMD Subscribers: kzhuravl, wdng, yaxunl, tony-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D26747 ``` --------------------------------------------------------------------- llvm-svn: 288106
-
Tom Stellard authored
```--------------------------------------------------------------------- r280589 | nhaehnle | 2016-09-03 05:26:32 -0700 (Sat, 03 Sep 2016) | 19 lines AMDGPU: Fix an interaction between WQM and polygon stippling Summary: This fixes a rare bug in polygon stippling with non-monolithic pixel shaders. The underlying problem is as follows: the prolog part contains the polygon stippling sequence, i.e. a kill. The main part then enables WQM based on the _reduced_ exec mask, effectively undoing most of the polygon stippling. Since we cannot know whether polygon stippling will be used, the main part of a non-monolithic shader must always return to exact mode to fix this problem. Reviewers: arsenm, tstellarAMD, mareko Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: https://reviews.llvm.org/D23131 ``` --------------------------------------------------------------------- llvm-svn: 288105
-
Tom Stellard authored
```--------------------------------------------------------------------- r277504 | nhaehnle | 2016-08-02 12:31:14 -0700 (Tue, 02 Aug 2016) | 21 lines AMDGPU: Stay in WQM for non-intrinsic stores Summary: Two types of stores are possible in pixel shaders: stores to memory that are explicitly requested at the API level, and stores that are an implementation detail of register spilling or lowering of arrays. For the first kind of store, we must ensure that helper pixels have no effect and hence WQM must be disabled. The second kind of store must always be executed, because the written value may be loaded again in a way that is relevant for helper pixels as well -- and there are no externally visible effects anyway. This is a candidate for the 3.9 release branch. Reviewers: arsenm, tstellarAMD, mareko Subscribers: arsenm, kzhuravl, llvm-commits Differential Revision: https://reviews.llvm.org/D22675 ``` --------------------------------------------------------------------- llvm-svn: 288104
-
Tom Stellard authored
```--------------------------------------------------------------------- r277500 | nhaehnle | 2016-08-02 12:17:37 -0700 (Tue, 02 Aug 2016) | 18 lines AMDGPU: Track physical registers in SIWholeQuadMode Summary: There are cases where uniform branch conditions are computed in VGPRs, and we didn't correctly mark those as WQM. The stray change in basic-branch.ll is because invoking the LiveIntervals analysis leads to the detection of a dead register that would otherwise not be seen at -O0. This is a candidate for the 3.9 branch, as it fixes a possible hang. Reviewers: arsenm, tstellarAMD, mareko Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: https://reviews.llvm.org/D22673 ``` --------------------------------------------------------------------- llvm-svn: 288103
-
- 28 Nov, 2016 10 commits
-
-
Pawel Bylica authored
------------------------------------------------------------------------ r286998 | chfast | 2016-11-15 19:29:24 +0100 (wto, 15 lis 2016) | 12 lines Integer legalization: fix MUL expansion Summary: This fixes the runtime results produces by the fallback multiplication expansion introduced in r270720. For tests I created a fuzz tester that compares the results with Boost.Multiprecision. Reviewers: hfinkel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26628 llvm-svn: 288086
-
Pawel Bylica authored
------------------------------------------------------------------------ r281403 | chfast | 2016-09-13 23:55:41 +0200 (wto, 13 wrz 2016) | 9 lines [CodeGen] Fix invalid shift in mul expansion Summary: When expanding mul in type legalization make sure the type for shift amount can actually fit the value. This fixes PR30354 https://llvm.org/bugs/show_bug.cgi?id=30354. Reviewers: hfinkel, majnemer, RKSimon Subscribers: RKSimon, llvm-commits Differential Revision: https://reviews.llvm.org/D24478 llvm-svn: 288085
-
Tom Stellard authored
```--------------------------------------------------------------------- r284444 | beanz | 2016-10-17 17:50:39 -0700 (Mon, 17 Oct 2016) | 4 lines [CMake] Add missing dependency on intrinsics_gen COFF/InputFiles.h includes LTOModule.h which transitively relies on Attributes.inc. ``` --------------------------------------------------------------------- llvm-svn: 288078
-
Tom Stellard authored
```--------------------------------------------------------------------- r285782 | brad | 2016-11-01 18:39:01 -0700 (Tue, 01 Nov 2016) | 9 lines Disable the use of std::call_once on OpenBSD with libstdc++. It was noticed this caused performance regressions and deadlocks. PR30768. Reorder the code to make it clearer what is tested. PPC now disables the use of std::call_once only with libstdc++ with the reordering of the code, as was the original intent. ``` --------------------------------------------------------------------- llvm-svn: 288075
-
Tom Stellard authored
```--------------------------------------------------------------------- r283612 | davide | 2016-10-07 14:53:09 -0700 (Fri, 07 Oct 2016) | 5 lines [InstCombine] Don't unpack arrays that are too large (part 2). This is similar to r283599, but for store instructions. Thanks to David for pointing out! ``` --------------------------------------------------------------------- llvm-svn: 288070
-
Tom Stellard authored
```--------------------------------------------------------------------- r283599 | davide | 2016-10-07 13:57:42 -0700 (Fri, 07 Oct 2016) | 4 lines [InstCombine] Don't unpack arrays that are too large Differential Revision: https://reviews.llvm.org/D25376 ``` --------------------------------------------------------------------- llvm-svn: 288069
-
Tom Stellard authored
```--------------------------------------------------------------------- r281650 | david.majnemer | 2016-09-15 13:10:09 -0700 (Thu, 15 Sep 2016) | 6 lines [InstCombine] Do not RAUW a constant GEP canRewriteGEPAsOffset expects to process instructions, not constants. This fixes PR30342. ``` --------------------------------------------------------------------- llvm-svn: 288066
-
Tom Stellard authored
```--------------------------------------------------------------------- r279980 | david.majnemer | 2016-08-29 10:14:08 -0700 (Mon, 29 Aug 2016) | 7 lines [SimplifyCFG] Hoisting invalidates metadata We forgot to remove optimization metadata when performing hosting during FoldTwoEntryPHINode. This fixes PR29163. ``` --------------------------------------------------------------------- llvm-svn: 288063
-
Tom Stellard authored
```--------------------------------------------------------------------- r287999 | hfinkel | 2016-11-27 08:26:14 -0800 (Sun, 27 Nov 2016) | 14 lines Adjust type-trait evaluation to properly handle Using(Shadow)Decls Since r274049, for an inheriting constructor declaration, the name of the using declaration (and using shadow declaration comes from the using declaration) is the name of a derived class, not the base class (line 8225-8232 of lib/Sema/SemaDeclCXX.cpp in https://reviews.llvm.org/rL274049). Because of this, name-based lookup performed inside Sema::LookupConstructors returns not only CXXConstructorDecls but also Using(Shadow)Decls, which results assertion failure reported in PR29087. Patch by Taewook Oh, thanks! Differential Revision: https://reviews.llvm.org/D23765 ``` --------------------------------------------------------------------- llvm-svn: 288058
-
Alexey Bataev authored
```--------------------------------------------------------------------- r287227 | abataev | 2016-11-17 15:12:05 +0000 (Thu, 17 Nov 2016) | 4 lines [OPENMP] Fixed codegen for 'omp cancel' construct. If 'omp cancel' construct is used in a worksharing construct it may cause hanging of the software in case if reduction clause is used. Patch fixes this problem by avoiding extra reduction processing for branches that were canceled. ``` --------------------------------------------------------------------- llvm-svn: 288048
-
- 25 Nov, 2016 3 commits
-
-
Mehdi Amini authored
[RTDyld] Fix a bug in RTDyldMemoryManager::deregisterEHFrames. See: https://llvm.org/bugs/show_bug.cgi?id=31160 llvm-svn: 287912
-
Tom Stellard authored
```--------------------------------------------------------------------- r280990 | davide | 2016-09-08 14:18:38 -0700 (Thu, 08 Sep 2016) | 4 lines [ELF] Fix DT_NEEDED value. Differential Revision: https://reviews.llvm.org/D24363 ``` --------------------------------------------------------------------- llvm-svn: 287907
-
Tom Stellard authored
```--------------------------------------------------------------------- r287353 | hans | 2016-11-18 09:33:05 -0800 (Fri, 18 Nov 2016) | 12 lines IRMover: Avoid accidentally mapping types from the destination module (PR30799) During Module linking, it's possible for SrcM->getIdentifiedStructTypes(); to return types that are actually defined in the destination module (DstM). Depending on how the bitcode file was read, getIdentifiedStructTypes() might do a walk over all values, including metadata nodes, looking for types. In my case, a debug info metadata node was shared between the two modules, and it referred to a type defined in the destination module (see test case). Differential Revision: https://reviews.llvm.org/D26212 ``` --------------------------------------------------------------------- llvm-svn: 287906
-
- 24 Nov, 2016 1 commit
-
-
Guy Blank authored
[X86] Do not use AND8ri8 in AVX512 pattern This variant is (as documented in the TD) for disassembler use only, and should not be used in patterns - it is longer, and is broken on 64-bit. llvm-svn: 287855
-
- 23 Nov, 2016 12 commits
-
-
Tom Stellard authored
```--------------------------------------------------------------------- r275926 | kkwli0 | 2016-07-18 15:49:16 -0700 (Mon, 18 Jul 2016) | 25 lines [OpenMP] Fix incorrect diagnostics in map clause Having the following code pattern will result in incorrect diagnostic int main() { int arr[10]; #pragma omp target data map(arr[:]) #pragma omp target map(arr) {} } t.cpp:4:24: error: original storage of expression in data environment is shared but data environment do not fully contain mapped expression storage #pragma omp target map(arr) ^~~ t.cpp:3:29: note: used here #pragma omp target data map(arr[:]) ^~~~~~ 1 error generated. Patch by David S. Differential Revision: https://reviews.llvm.org/D22075 ``` --------------------------------------------------------------------- llvm-svn: 287816 -
Mehdi Amini authored
Merge r275905 into 3.9 branch: Allow iOS and tvOS version numbers with 2-digit major version numbers. See: http://llvm.org/PR30555 llvm-svn: 287815
-
Tom Stellard authored
```--------------------------------------------------------------------- r282182 | nemanja.i.ibm | 2016-09-22 12:06:38 -0700 (Thu, 22 Sep 2016) | 6 lines [PowerPC] Sign extend sub-word values for atomic comparisons Atomic comparison instructions use the sub-word load instruction on Power8 and up but the value is not sign extended prior to the signed word compare instruction. This patch adds that sign extension. ``` --------------------------------------------------------------------- llvm-svn: 287811
-
Tom Stellard authored
```--------------------------------------------------------------------- r279933 | hfinkel | 2016-08-28 09:17:58 -0700 (Sun, 28 Aug 2016) | 4 lines [PowerPC] Implement lowering for atomicrmw min/max/umin/umax Implement lowering for atomicrmw min/max/umin/umax. Fixes PR28818. ``` --------------------------------------------------------------------- llvm-svn: 287810
-
Tom Stellard authored
```--------------------------------------------------------------------- r281479 | nemanja.i.ibm | 2016-09-14 07:19:09 -0700 (Wed, 14 Sep 2016) | 9 lines Fix code-gen crash on Power9 for insert_vector_elt with variable index (PR30189) This patch corresponds to review: https://reviews.llvm.org/D24021 In the initial implementation of this instruction, I forgot to account for variable indices. This patch fixes PR30189 and should probably be merged into 3.9.1 (I'll open a bug according to the new instructions). ``` --------------------------------------------------------------------- llvm-svn: 287809
-
Mehdi Amini authored
See: http://llvm.org/PR31072 llvm-svn: 287805
-
Tom Stellard authored
```--------------------------------------------------------------------- r281797 | richard-llvm | 2016-09-16 16:30:39 -0700 (Fri, 16 Sep 2016) | 10 lines Fix a couple of wrong-code bugs in switch-on-constant optimization: * recurse through intermediate LabelStmts and AttributedStmts when checking whether a statement inside a switch declares a variable * if the end of a compound statement is reachable from the chosen case label, and the compound statement contains a variable declaration, it's not valid to just emit the contents of the compound statement -- we must emit the statement itself or we lose the scope (and thus end lifetimes at the wrong point) ``` --------------------------------------------------------------------- llvm-svn: 287790
-
Mehdi Amini authored
[LTO] Merge r287685 into the 3.9.1 branch, darwin: Unconditionally pass -lto_library, remove -Wliblto warning. See: https://llvm.org/bugs/PR31120 llvm-svn: 287784
-
Tom Stellard authored
```--------------------------------------------------------------------- r279930 | elena.demikhovsky | 2016-08-28 01:53:53 -0700 (Sun, 28 Aug 2016) | 7 lines [Loop Vectorizer] Fixed memory confilict checks. Fixed a bug in run-time checks for possible memory conflicts inside loop. The bug is in Low <-> High boundaries calculation. The High boundary should be calculated as "last memory access pointer + element size". Differential revision: https://reviews.llvm.org/D23176 ``` --------------------------------------------------------------------- llvm-svn: 287779
-
Tom Stellard authored
```--------------------------------------------------------------------- r280143 | dberlin | 2016-08-30 12:58:48 -0700 (Tue, 30 Aug 2016) | 2 lines IntrArgMemOnly is only defined (and current AA machinery only sanely supports) pointer arguments, and these intrinsics have vector of pointer arguments. Remove ArgMemOnly until we either have the machinery, define a new attribute, or something similar ``` --------------------------------------------------------------------- llvm-svn: 287777
-
Nitesh Jain authored
```--------------------------------------------------------------------- r284001 | nitesh.jain | 2016-10-12 15:51:09 +0530 (Wed, 12 Oct 2016) | 7 lines [LLDB][MIPS] Fix qProcessInfo to return correct pointer size based on ELF ABI Reviewers: clayborg, labath Subscribers: jaydeep, bhushan, slthakur, lldb-commits Differential Revision: https://reviews.llvm.org/D25021 ``` --------------------------------------------------------------------- llvm-svn: 287747
-
Nitesh Jain authored
```--------------------------------------------------------------------- r284003 | nitesh.jain | 2016-10-12 16:23:57 +0530 (Wed, 12 Oct 2016) | 7 lines [LLDB][MIPS] fix Floating point register read/write for big endian Reviewers: clayborg, labath, jaydeep Subscribers: bhushan, slthakur, lldb-commits Differential Revision: https://reviews.llvm.org/D24603 ``` --------------------------------------------------------------------- llvm-svn: 287746
-