- 16 May, 2014 4 commits
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Tom Stellard authored
```--------------------------------------------------------------------- r201843 | chandlerc | 2014-02-21 00:37:30 -0800 (Fri, 21 Feb 2014) | 4 lines Teach libc++ to use the compiler-provided C-compatible ::max_align_t rather than its own type for std::max_align_t. This is particularly relevant as the types may not be ABI compatible despite users expecting them to be. ``` --------------------------------------------------------------------- llvm-svn: 209032
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Tom Stellard authored
llvm-svn: 209031
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Tom Stellard authored
llvm-svn: 209030
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Tom Stellard authored
```--------------------------------------------------------------------- r197036 | david.tweed | 2013-12-11 08:39:46 -0500 (Wed, 11 Dec 2013) | 8 lines Add front-end infrastructure now address space casts are in LLVM IR. With the introduction of explicit address space casts into LLVM, there's a need to provide a new cast kind the front-end can create for C/OpenCL/CUDA and code to produce address space casts from those kinds when appropriate. Patch by Michele Scandale! ``` --------------------------------------------------------------------- llvm-svn: 209029
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- 15 May, 2014 4 commits
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Tom Stellard authored
```--------------------------------------------------------------------- r208908 | thomas.stellard | 2014-05-15 15:50:25 -0400 (Thu, 15 May 2014) | 7 lines autoconf: Fix libLLVM-Major-Minor-Patch.so symlink The symlink needs to point to a relative path, so we don't break building in a chroot. Tested-by:Laurent Carlier <lordheavym@gmail.org> ``` --------------------------------------------------------------------- llvm-svn: 208917
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Tom Stellard authored
```--------------------------------------------------------------------- r208501 | hfinkel | 2014-05-11 12:23:29 -0400 (Sun, 11 May 2014) | 9 lines [PowerPC] On PPC32, 128-bit shifts might be runtime calls The counter-loops formation pass needs to know what operations might be function calls (because they can't appear in counter-based loops). On PPC32, 128-bit shifts might be runtime calls (even though you can't use __int128 on PPC32, it seems that SROA might form them). Fixes PR19709. ``` --------------------------------------------------------------------- llvm-svn: 208916
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Tom Stellard authored
```--------------------------------------------------------------------- r208721 | thomas.stellard | 2014-05-13 15:37:03 -0400 (Tue, 13 May 2014) | 11 lines autoconf: Fix soname for libLLVM-Major.Minor.so (2nd try) We were using libLLVM-Major.Minor.Patch.so for the soname, but we need the soname to stay consistent for all Major.Minor.* releases otherwise operating system distributors will need to rebuild all packages that link with LLVM every time there is a new point release. This patch also reverses the compatibility symlink, so libLLVM-Major.Minor.Patch.so is now a symlink that points to libLLVM-Major-Minor.so. ``` --------------------------------------------------------------------- llvm-svn: 208829
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Tom Stellard authored
```--------------------------------------------------------------------- r207990 | marek.olsak | 2014-05-05 15:30:54 -0400 (Mon, 05 May 2014) | 6 lines R600/SI: allow 5 more input SGPRs to a shader Our OpenGL driver needs 22 SGPRs (16 user SGPRs + 6 streamout non-user SGPRs). Signed-off-by:Marek Olšák <marek.olsak@amd.com> ``` --------------------------------------------------------------------- llvm-svn: 208828
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- 12 May, 2014 5 commits
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Tom Stellard authored
```--------------------------------------------------------------------- r202911 | david.majnemer | 2014-03-04 18:43:48 -0500 (Tue, 04 Mar 2014) | 14 lines Headers: Provide an ABI compatible max_align_t when _MSC_VER is defined Summary: Our usual definition of max_align_t wouldn't match up with MSVC if it was used in a template argument. Reviewers: chandlerc, rsmith, rnk Reviewed By: chandlerc CC: cfe-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2924 ``` --------------------------------------------------------------------- llvm-svn: 208601
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Tom Stellard authored
```--------------------------------------------------------------------- r201729 | chandlerc | 2014-02-19 17:35:01 -0500 (Wed, 19 Feb 2014) | 21 lines Teach Clang to provide ::max_align_t in C11 and C++11 modes. This definition is not chosen idly. There is an unfortunate reality with max_align_t -- the specific nature of its definition leaks into the ABI almost immediately. Because it is part of C11 and C++11 it becomes essential for it to match with other systems on that ABI. There is an effort to discourage any further use of this construct as a consequence -- using max_align_t introduces an immediate ABI problem. We can never update it to have larger alignment even as the microarchitecture changes to necessitate higher alignment. =/ The particular definition here exactly matches the ABI of GCC's chosen ::max_align_t definition, for better or worse. This was written with the help of Richard Smith who was decoding the exact ABI implications of the selected definition in GCC. Notably, in-register arguments are impacted by the particular definition chosen. =/ No one is under the illusion that this is a "good" or "useful" definition of max_align_t, and we are working with the standards committee to specify a more useful interface to address this need. ``` --------------------------------------------------------------------- llvm-svn: 208600
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Tom Stellard authored
llvm-svn: 208599
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Tom Stellard authored
llvm-svn: 208597
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Tom Stellard authored
llvm-svn: 208596
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- 25 Apr, 2014 1 commit
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Tom Stellard authored
```--------------------------------------------------------------------- r198940 | kristof.beyls | 2014-01-10 08:44:34 -0500 (Fri, 10 Jan 2014) | 2 lines Enable -fuse-init-array for all AArch64 ELF targets by default, not just linux. ``` --------------------------------------------------------------------- llvm-svn: 207288
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- 21 Apr, 2014 1 commit
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Tom Stellard authored
This reverts commit r206064. This commit regressed the MultiSource/Applications/sgefa/sgefa test. llvm-svn: 206783
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- 11 Apr, 2014 17 commits
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Tom Stellard authored
```--------------------------------------------------------------------- r203581 | hans | 2014-03-11 11:49:24 -0400 (Tue, 11 Mar 2014) | 7 lines X86: Don't generate 64-bit movd after cmpneqsd in 32-bit mode (PR19059) This fixes the bug where we would bitcast the 64-bit floating point result of cmpneqsd to a 64-bit integer even on 32-bit targets. Differential Revision: http://llvm-reviews.chandlerc.com/D3009 ``` --------------------------------------------------------------------- llvm-svn: 206071
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Tom Stellard authored
```--------------------------------------------------------------------- r196981 | fang | 2013-12-10 17:51:25 -0500 (Tue, 10 Dec 2013) | 2 lines darwin asm driver: suppress -Q for -no-integrated-as on darwin<11 ``` --------------------------------------------------------------------- llvm-svn: 206067
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Tom Stellard authored
```--------------------------------------------------------------------- r204742 | benny.kra | 2014-03-25 14:02:07 -0400 (Tue, 25 Mar 2014) | 10 lines Fix an logic error in the clang driver preventing crtfastmath.o from linking when -Ofast is used without -ffast-math In gcc using -Ofast forces linking of crtfastmath.o. In the current clang crtfastmath.o is only linked when -ffast-math/-funsafe-math-optimizations passed. It can lead to performance issues, when using only -Ofast without explicit -ffast-math (I faced with it). My patch fixes inconsistency with gcc behaviour and also introduces few tests on it. Patch by Zinovy Nis! Differential Revision: http://llvm-reviews.chandlerc.com/D3114 ``` --------------------------------------------------------------------- llvm-svn: 206066
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Tom Stellard authored
```--------------------------------------------------------------------- r198937 | kristof.beyls | 2014-01-10 08:41:49 -0500 (Fri, 10 Jan 2014) | 2 lines Make sure -use-init-array has intended effect on all AArch64 ELF targets, not just linux. ``` --------------------------------------------------------------------- llvm-svn: 206065
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Tom Stellard authored
```--------------------------------------------------------------------- r198940 | kristof.beyls | 2014-01-10 08:44:34 -0500 (Fri, 10 Jan 2014) | 2 lines Enable -fuse-init-array for all AArch64 ELF targets by default, not just linux. ``` --------------------------------------------------------------------- llvm-svn: 206064
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Tom Stellard authored
```--------------------------------------------------------------------- r202774 | reid | 2014-03-03 19:33:17 -0500 (Mon, 03 Mar 2014) | 7 lines MC: Fix Intel assembly parser for [global + offset] We were dropping the displacement on the floor if we also had some immediate offset. Should fix PR19033. ``` --------------------------------------------------------------------- llvm-svn: 206061
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Tom Stellard authored
```--------------------------------------------------------------------- r203007 | rafael.espindola | 2014-03-05 16:04:41 -0500 (Wed, 05 Mar 2014) | 4 lines Don't produce an alias between destructors with different calling conventions. Fixes pr19007. ``` --------------------------------------------------------------------- llvm-svn: 206059
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Tom Stellard authored
```--------------------------------------------------------------------- r205144 | hfinkel | 2014-03-30 09:00:06 -0400 (Sun, 30 Mar 2014) | 7 lines [PowerPC] Make -pg generate calls to _mcount not mcount At least on REL6 (Linux/glibc 2.12), the proper symbol for generating gprof data is _mcount, not mcount. Prior to this change, compiling with -pg would generate linking errors (because of unresolved references to mcount), after this change -pg seems at least minimally functional. ``` --------------------------------------------------------------------- llvm-svn: 206058
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Tom Stellard authored
```--------------------------------------------------------------------- r201126 | craig.topper | 2014-02-10 23:05:33 -0500 (Mon, 10 Feb 2014) | 2 lines Changed attributes of all gather intrinsics from IntrReadMem to IntrReadArgMem as they access only memory based on argument. Patch by Robert Khasanov. ``` --------------------------------------------------------------------- llvm-svn: 206057
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Tom Stellard authored
```--------------------------------------------------------------------- r201507 | craig.topper | 2014-02-17 05:03:43 -0500 (Mon, 17 Feb 2014) | 2 lines Fix diassembler handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 should ignore the base register entirely. Mod=01/10 should treat this as R13 plus displacment. Fixes PR18860. ``` --------------------------------------------------------------------- llvm-svn: 206056
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Tom Stellard authored
```--------------------------------------------------------------------- r205067 | ahatanaka | 2014-03-28 19:28:07 -0400 (Fri, 28 Mar 2014) | 7 lines [x86] Fix printing of register operands with q modifier. Emit 32-bit register names instead of 64-bit register names if the target does not have 64-bit general purpose registers. <rdar://problem/14653996> ``` --------------------------------------------------------------------- llvm-svn: 206055
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Tom Stellard authored
```--------------------------------------------------------------------- r200028 | benny.kra | 2014-01-24 14:02:37 -0500 (Fri, 24 Jan 2014) | 4 lines InstCombine: Don't try to use aggregate elements of ConstantExprs. PR18600. ``` --------------------------------------------------------------------- llvm-svn: 206054
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Tom Stellard authored
```--------------------------------------------------------------------- r199351 | aschwaighofer | 2014-01-15 23:53:18 -0500 (Wed, 15 Jan 2014) | 5 lines BasicAA: We need to check both access sizes when comparing a gep and an underlying object of unknown size. Fixes PR18460. ``` --------------------------------------------------------------------- llvm-svn: 206053
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Tom Stellard authored
```--------------------------------------------------------------------- r198400 | aschwaighofer | 2014-01-03 00:47:03 -0500 (Fri, 03 Jan 2014) | 18 lines BasicAA: Use reachabilty instead of dominance for checking value equality in phi cycles This allows the value equality check to work even if we don't have a dominator tree. Also add some more comments. I was worried about compile time impacts and did not implement reachability but used the dominance check in the initial patch. The trade-off was that the dominator tree was required. The llvm utility function isPotentiallyReachable cuts off the recursive search after 32 visits. Testing did not show any compile time regressions showing my worries unjustfied. No compile time or performance regressions at O3 -flto -mavx on test-suite + externals. Addresses review comments from r198290. ``` --------------------------------------------------------------------- llvm-svn: 206052
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Tom Stellard authored
```--------------------------------------------------------------------- r198290 | aschwaighofer | 2014-01-01 22:31:36 -0500 (Wed, 01 Jan 2014) | 23 lines BasicAA: Fix value equality and phi cycles When there are cycles in the value graph we have to be careful interpreting "Value*" identity as "value" equivalence. We interpret the value of a phi node as the value of its operands. When we check for value equivalence now we make sure that the "Value*" dominates all cycles (phis). %0 = phi [%noaliasval, %addr2] %l = load %ptr %addr1 = gep @a, 0, %l %addr2 = gep @a, 0, (%l + 1) store %ptr ... Before this patch we would return NoAlias for (%0, %addr1) which is wrong because the value of the load is from different iterations of the loop. Tested on x86_64 -mavx at O3 and O3 -flto with no performance or compile time regressions. PR18068 radar://15653794 ``` --------------------------------------------------------------------- llvm-svn: 206051
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Tom Stellard authored
```--------------------------------------------------------------------- r196970 | fang | 2013-12-10 16:37:41 -0500 (Tue, 10 Dec 2013) | 3 lines on darwin<10, fallback to .weak_definition (PPC,X86) .weak_def_can_be_hidden was not yet supported by the system assembler ``` --------------------------------------------------------------------- llvm-svn: 206050
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Tom Stellard authored
```--------------------------------------------------------------------- r195971 | juergen | 2013-11-29 22:07:16 -0500 (Fri, 29 Nov 2013) | 2 lines Force CPU type to unbreak unit tests on Haswell machines. ``` --------------------------------------------------------------------- llvm-svn: 206049
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- 09 Apr, 2014 8 commits
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Tom Stellard authored
------------------------------------------------------------------------ r200705 | hfinkel | 2014-02-03 12:27:25 -0500 (Mon, 03 Feb 2014) | 5 lines Expand vector bswap in LegalizeVectorOps ISD::BSWAP was missing from the list of node types that should be expanded element-wise. llvm-svn: 205910
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Tom Stellard authored
```--------------------------------------------------------------------- r205630 | hfinkel | 2014-04-04 11:15:57 -0400 (Fri, 04 Apr 2014) | 6 lines [PowerPC] Add a full condition code register to make the "cc" clobber work gcc inline asm supports specifying "cc" as a clobber of all condition registers. Add just enough modeling of the full register to make this work. Fixed PR19326. ``` --------------------------------------------------------------------- llvm-svn: 205908
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Tom Stellard authored
```--------------------------------------------------------------------- r204304 | Hao.Liu | 2014-03-20 01:36:59 -0400 (Thu, 20 Mar 2014) | 2 lines [ARM]Fix an assertion failure in A15SDOptimizer about DPair reg class by treating DPair as QPR. ``` --------------------------------------------------------------------- llvm-svn: 205904
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Tom Stellard authored
```--------------------------------------------------------------------- r201841 | Kevin.Qin | 2014-02-21 02:45:48 -0500 (Fri, 21 Feb 2014) | 2 lines [AArch64] Add register constraints to avoid generating STLXR and STXR with unpredictable behavior. ``` --------------------------------------------------------------------- llvm-svn: 205903
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Tom Stellard authored
```--------------------------------------------------------------------- r201541 | jiangning.liu | 2014-02-17 21:37:42 -0500 (Mon, 17 Feb 2014) | 2 lines Fix a typo about lowering AArch64 va_copy. ``` --------------------------------------------------------------------- llvm-svn: 205902
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Tom Stellard authored
```--------------------------------------------------------------------- r199369 | jiangning.liu | 2014-01-16 04:16:13 -0500 (Thu, 16 Jan 2014) | 2 lines For ARM, fix assertuib failures for some ld/st 3/4 instruction with wirteback. ``` --------------------------------------------------------------------- llvm-svn: 205901
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Tom Stellard authored
```--------------------------------------------------------------------- r204155 | wschmidt | 2014-03-18 10:32:50 -0400 (Tue, 18 Mar 2014) | 16 lines Fix PR19144: Incorrect offset generated for int-to-fp conversion at -O0. When converting a signed 32-bit integer to double-precision floating point on hardware without a lfiwax instruction, we have to instead use a lfd followed by fcfid. We were erroneously offsetting the address by 4 bytes in preparation for either a lfiwax or lfiwzx when generating the lfd. This fixes that silly error. This was not caught in the test suite since the conversion tests were run with -mcpu=pwr7, which implies availability of lfiwax. I've added another test case for older hardware that checks the code we expect in the absence of lfiwax and other flavors of fcfid. There are fewer tests in this test case because we punt to DAG selection in more cases on older hardware. (We must generate complex fiddly sequences in those cases, and there is marginal benefit in duplicating that logic in fast-isel.) ``` --------------------------------------------------------------------- llvm-svn: 205824
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Tom Stellard authored
```--------------------------------------------------------------------- r203054 | hfinkel | 2014-03-05 20:28:23 -0500 (Wed, 05 Mar 2014) | 7 lines The PPC global base register cannot be r0 The global base register cannot be r0 because it might end up as the first argument to addi or addis. Fixes PR18316. I don't have a small stable test case. ``` --------------------------------------------------------------------- llvm-svn: 205823
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